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  • TPS65631 Dual-Output AMOLED Display Power Supply

    • SLVSBK1E September   2012  – May 2014 TPS65631

      PRODUCTION DATA.  

  • CONTENTS
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  • TPS65631 Dual-Output AMOLED Display Power Supply
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Boost Converter
      2. 8.3.2 Inverting Buck-Boost Converter
        1. 8.3.2.1 Programming VNEG
        2. 8.3.2.2 Controlling the VNEG Transition Time
      3. 8.3.3 Soft-Start and Start-Up Sequence
      4. 8.3.4 Enable (CTRL)
      5. 8.3.5 Undervoltage Lockout
      6. 8.3.6 Short Circuit Protection
        1. 8.3.6.1 Short-Circuits During Normal Operation
        2. 8.3.6.2 Short-Circuits During Start-Up
      7. 8.3.7 Output Discharge During Shutdown
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation with VI < 2.9 V
      2. 8.4.2 Operation with VI ≈ VPOS (Diode Mode)
      3. 8.4.3 Operation with CTRL
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Capacitor Selection
        3. 9.2.2.3 Stability
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • DPD|12
    • MPSS059B
Thermal pad, mechanical data (Package|Pins)
  • DPD|12
    • QFND399
Orderable Information
  • slvsbk1e_oa
  • slvsbk1e_pm
search No matches found.
  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
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  • Card with all content

 

DATA SHEET

TPS65631 Dual-Output AMOLED Display Power Supply

1 Features

  • 2.9-V to 4.5-V Input Voltage Range
  • Fixed 4.6-V Positive Output Voltage
  • 0.5% VPOS Accuracy from 25ºC to 85ºC
  • Separate VPOS Output Sense Pin
  • Negative Output Voltage Digitally Programmable from –1.4 V to –4.4 V (–4 V Default)
  • Output Currents up to 250 mA Supported
  • Excellent Line Transient Regulation
  • Short-Circuit Protection
  • Thermal Shutdown
  • Available in 3.00-mm × 3.00-mm, 12-Pin QFN Package

2 Applications

    AMOLED Displays

3 Description

The TPS65631 is designed to drive AMOLED (Active Matrix Organic Light Emitting Diode) displays requiring positive and negative supply rails. The device integrates a boost converter for VPOS and an inverting buck boost converter for VNEG and is suitable for battery-operated products. The digital control pin (CTRL) allows programming the negative output voltage in digital steps. The TPS65631 uses a novel technology enabling excellent line transient performance.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS65631 QFN (12) 3.00 mm × 3.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet

4 Simplified Schematic

Schem_01_SLVSBK1.gif

Efficiency vs Output Current

AppPerf_00_SLVSBK1.png

5 Revision History

DATE REVISION NOTES
May 2014 E No legacy rev history for rev E – first public release

Changes from D Revision (November 2012) to E Revision

  • Changed the data sheet to the new TI layout.Go
  • Changed the Features ListGo
  • Added the Device Information tableGo
  • Changed the Simplified Schematic and added the Efficiency vs Output Current graph Go
  • Added the pinout Bottom View Go
  • Added the Handling Ratings tableGo
  • Added Output voltage range to the ROC table Go
  • Added Output current range to the ROC table Go
  • Changed the Typical Characteristics graphsGo

Changes from C Revision (October 2012) to D Revision

  • Changed the Absolute Maximum Ratings of SWP, OUTP, FBS, PVIN, AVIN From: 5.5 V, To: 6 V Go
  • Changed the Absolute Maximum Rating of OUTN From: -6.5 V, To: -6 V Go
  • Changed the Absolute Maximum Rating of SWN From: -6.5 ~ 4.8V, To: -6 ~ 6 V Go

Changes from B Revision (October 2012) to C Revision

  • Changed Figure 1Go

Changes from A Revision (October 2012) to B Revision

  • Changed pin description of pin 6 Go
  • Changed the Layout ExampleGo

Changes from * Revision (September 2012) to A Revision

  • Changed feature From: 300 mA Output Current for VPOS and VNEG To: Minimum 250mA Output CurrentGo

6 Pin Configuration and Functions

DPD PACKAGE
(TOP VIEW)
PinOut_01_SLVSBK1.gif
DPD PACKAGE
(BOTTOM VIEW)
PinOut_02_SLVSBK1.gif

Pin Functions

NAME NO. I/O DESCRIPTION
AGND 5 — Analog ground.
AVIN 11 — Input supply voltage for internal analog circuits (both converters).
CT 8 I/O Timing capacitor pin. Connect a capacitor between this pin and ground to control the time it takes for the output of the inverting buck-boost converter to ramp from one value of VNEG to another.
CTRL 7 I Control pin. Combined device enable and inverting buck-boost converter output voltage programming pin.
FBS 4 I Feedback sense pin of the boost converter output voltage.
GND 6 — Ground. (Note: it is possible to leave this pin floating without affecting device performance.)
PGND 2 — Power ground of the boost converter.
PVIN 12 — Input supply voltage pin for the inverting buck-boost converter.
SWN 10 O Switch pin of the inverting buck-boost converter.
SWP 1 O Switch pin of the boost converter.
OUTN 9 O Rectifier pin of the inverting buck-boost converter.
OUTP 3 O Rectifier pin of the boost converter.
Exposed Thermal Pad 13 — Connect this pad to AGND and PGND.

7 Specifications

7.1 Absolute Maximum Ratings (1)

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Input voltage (2) SWP, OUTP, FBS, PVIN, AVIN –0.3 6 V
OUTN –0.3 –6 V
SWN –6 6 V
CTRL –0.3 5.5 V
CT –0.3 3.6 V
Operating junction temperature range, TJ –40 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) With respect to GND pin.

7.2 Handling Ratings

MIN MAX UNIT
TSTG Storage temperature range –65 150 °C
VESD Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) –2 2 kV
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) –500 500 V
Machine model (MM) ESD stress voltage –200 200 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process..

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN NOM MAX UNIT
VI Input supply voltage range 2.9 3.7 4.5 V
VO Output voltage range VPOS 4.6 V
VNEG –4.4 –4 –1.4
IO Output current range IPOS 300 mA
INEG 300
TA Operating ambient temperature –40 25 85 °C
TJ Operating junction temperature –40 85 125 °C

7.4 Thermal Information

THERMAL METRIC(1) PD UNIT
12 PINS
RθJA Junction-to-ambient thermal resistance 51.5 °C/W
RθJCtop Junction-to-case (top) thermal resistance 47.1
RθJB Junction-to-board thermal resistance 25.0
ψJT Junction-to-top characterization parameter 0.5
ψJB Junction-to-board characterization parameter 25.2
RθJCbot Junction-to-case (bottom) thermal resistance 4.4
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

VI = 3.7 V, V(CTRL) = 3.7 V, VPOS = 4.6 V, VNEG = –4.0 V, TJ = –40°C to 125°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
II Shutdown current into AVIN and PVIN CTRL pin connected to ground. 0.1 µA
VUVLO Undervoltage lockout threshold VI rising. 2.4 V
VI falling. 2.1
BOOST CONVERTER
VO Output voltage 4.6 V
Output voltage tolerance 25°C ≤ TA ≤ 85°C, no load –0.5% 0.5%
–40°C ≤ TA < 85°C, no load –0.8% 0.8%
rDS(ON) Switch (low-side) on-resistance I(SWP) = 200 mA 200 mΩ
Rectifier (high-side) on-resistance I(SWP) = 200 mA 350
Switching frequency IO = 200 mA 1.7 MHz
Switch current limit Inductor valley current 0.8 1 A
Short-circuit threshold voltage in operation VO falling 4.1 V
Short-circuit detection time during operation 3 ms
Output sense threshold voltage using OUTP V(OUTP) - V(FBS) increasing 300 mV
Output sense threshold voltage using FBS V(OUTP) - V(FBS) decreasing 200 mV
Input resistance of FBS Between FBS pin and ground 4 MΩ
Discharge resistance CTRL pin connected to ground,
IO = 1 mA		 30 Ω
Line regulation IO = 200 mA 0.002 %/V
Load regulation 0.01 %/A
INVERTING BUCK-BOOST CONVERTER
VO Output voltage default –4.0 V
Output voltage range –4.4 –1.4
Output voltage tolerance –0.05 0.05
rDS(ON) Switch (high-side) on-resistance I(SWN) = 200 mA 200 mΩ
Rectifier (low-side) on-resistance I(SWN) = 200 mA 300
Switching frequency IO = 10 mA 1.7 MHz
Switch current limit VI = 2.9 V 1.5 2.2 A
Short-circuit threshold voltage during operation Voltage drop from nominal VO 500 mV
Short-circuit threshold voltage during start-up 180 200 230
tSCP Short-circuit detection time during start-up 10 ms
Short-circuit detection time during operation 3 ms
Discharge resistance CTRL pin connected to ground,
IO = 1 mA		 150 Ω
Line regulation IO = 200 mA 0.006 %/V
Load regulation 0.31 %/A
CTRL
High-level threshold voltage 1.2 V
Low-level threshold voltage 0.4 V
Pull-down resistance 150 400 860 kΩ
OTHER
R(CT) CT pin output resistance 150 300 500 kΩ
tINIT Initialization time 300 400 µs
tOFF Shut-down time 30 80 µs
tSTORE Data storage time 30 80 µs
TSD Thermal shutdown temperature 145 °C

7.6 Timing Requirements

MIN TYP MAX UNIT
CTRL Interface
tHIGH High-level pulse duration 2 10 25 µs
tLOW Low-level pulse duration 2 10 25 µs

7.7 Typical Characteristics

At TA = 25°C, unless otherwise noted.

SLVSBK1_TYP_CHAR_01.png
Figure 1. Shutdown Current into AVIN and PVIN
SLVSBK1_TYP_CHAR_03.png
Figure 3. Boost Converter Rectifier rDS(ON)
SLVSBK1_TYP_CHAR_05.png
Figure 5. Inverting Buck-Boost Converter Rectifier rDS(ON)
SLVSBK1_TYP_CHAR_02.png
Figure 2. Boost Converter Switch rDS(ON)
SLVSBK1_TYP_CHAR_04.png
Figure 4. Inverting Buck-Boost Converter Switch rDS(ON)

 
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