SLVSE46A November 2017 – January 2018 TPS65680
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
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7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PLL_BYPSS | MPL[2:0] | VDET[3:0] | |||||
R/W | R/W | R/W | |||||
OTP | OTP | OTP |
LEGEND: R/W = Read/Write; R = Read only ; -- = No NVM option; ROM = Read Only Memory; OTP = One Time Programmable; EEPROM = EEPROM |
Bit | Field | Type | Reset | Description | |||
---|---|---|---|---|---|---|---|
7 | PLL_BYPSS | R/W | 0 | PLL can be bypassed if sequencer clock is provided at LN_CLK input. 0 : PLL is enabled 1 : PLL is disabled and bypassed |
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6:4 | MPL[2:0] | R/W | 000 | PLL Multiplication factor 000 : 16x 001 : 32x 010 : 48x 011 : 64x 100 : 80x 101 : 96x 110 : 128x 111 : 160x |
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3:0 | VDET[3:0] | R/W | 0000 | These bits configure the VIN voltage threshold for discharge step 1. 0000 : disabled 0001 : 2.7V 0010 : 2.8V 0011 : 2.9V 0100 : 3.0V 0101 : 3.1V 0110 : 3.2V 0111 : 3.3V 1000 : 3.4V 1001 : 3.5V 1010 : 3.6V 1011 : 3.7V 1100 : 3.8V 1101 : 3.9V 1110 : 4.0V 1111 : 4.1V |