SWCS106F March   2013  – July 2016 TPS659119-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Characteristics
    5. 7.5  External Component Recommendation
    6. 7.6  I/O Pullup and Pulldown Characteristics
    7. 7.7  Digital I/O Voltage Electrical Characteristics
    8. 7.8  I2C Interface and Control Signals
    9. 7.9  Switching Characteristics—I2C Interface and Control Signals
    10. 7.10 Power Consumption
    11. 7.11 Power References and Thresholds
    12. 7.12 Thermal Monitoring and Shutdown
    13. 7.13 32-kHz RTC Clock
    14. 7.14 VRTC LDO
    15. 7.15 VIO SMPS
    16. 7.16 VDD1 SMPS
    17. 7.17 VDD2 SMPS
    18. 7.18 EXTCTRL
    19. 7.19 LDO1 AND LDO2
    20. 7.20 LDO3 and LDO4
    21. 7.21 LDO5
    22. 7.22 LDO6 and LDO7
    23. 7.23 LDO8
    24. 7.24 Timing Requirements for Boot Sequence Example
    25. 7.25 Power Control Timing Requirements
    26. 7.26 Device SLEEP State Control Timing Requirements
    27. 7.27 Supplies State Control Through EN1 and EN2 Timing Characteristics
    28. 7.28 VDD1 Supply Voltage Control Through EN1 Timing Requirements
    29. 7.29 Typical Characteristics
      1. 7.29.1 VIO SMPS Curves
      2. 7.29.2 VDD1 SMPS Curves
      3. 7.29.3 VDD2 SMPS Curves
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Reference
      2. 8.3.2 Power Resources
      3. 8.3.3 PWM and LED Generators
      4. 8.3.4 Dynamic-Voltage Frequency Scaling and Adaptive-Voltage Scaling Operation
      5. 8.3.5 32-kHz RTC Clock
      6. 8.3.6 Real-Time Clock (RTC)
      7. 8.3.7 Thermal Monitoring and Shutdown
      8. 8.3.8 Crystal Oscillator Power-On Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Embedded Power Controller
        1. 8.4.1.1 State-Machine
          1. 8.4.1.1.1 Device POWER-ON Enable Conditions
          2. 8.4.1.1.2 Device POWER ON Disable Conditions
          3. 8.4.1.1.3 Device SLEEP Enable Conditions
          4. 8.4.1.1.4 Device Reset Scenarios
        2. 8.4.1.2 Boot Configuration and Switch-On and Switch-Off Sequences
        3. 8.4.1.3 Control Signals
          1. 8.4.1.3.1  SLEEP
          2. 8.4.1.3.2  PWRHOLD
          3. 8.4.1.3.3  BOOT1
          4. 8.4.1.3.4  NRESPWRON, NRESPWRON2
          5. 8.4.1.3.5  CLK32KOUT
          6. 8.4.1.3.6  PWRON
          7. 8.4.1.3.7  INT1
          8. 8.4.1.3.8  EN2 and EN1
          9. 8.4.1.3.9  GPIO0-8
          10. 8.4.1.3.10 HDRST Input
          11. 8.4.1.3.11 PWRDN
          12. 8.4.1.3.12 Watchdog
          13. 8.4.1.3.13 Tracking LDO
    5. 8.5 Programming
      1. 8.5.1 Time-Calendar Registers
      2. 8.5.2 General Registers
      3. 8.5.3 Compensation Registers
      4. 8.5.4 Backup Registers
      5. 8.5.5 I2C Interface
        1. 8.5.5.1 Addressing
        2. 8.5.5.2 Access Protocols
          1. 8.5.5.2.1 Single-Byte Access
          2. 8.5.5.2.2 Multiple-Byte Access To Several Adjacent Registers
      6. 8.5.6 Interrupts
    6. 8.6 Register Maps
      1. 8.6.1 Functional Registers
      2. 8.6.2 TPS659119-Q1_FUNC_REG Register Mapping Summary
      3. 8.6.3 TPS659119-Q1_FUNC_REG Register Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step-down Converter Input Capacitors
        2. 9.2.2.2 Step-down Converter Output Capacitors
        3. 9.2.2.3 Step-down Converter Inductors
        4. 9.2.2.4 LDO Input Capacitors
        5. 9.2.2.5 LDO Output Capacitors
        6. 9.2.2.6 VCC7
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Device Nomenclature
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified with the Following Results:
    • Device Temperature Grade 3: –40°C to 85°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • Embedded Power Controller (EPC) With EEPROM Programmability
  • Two Efficient Step-Down DC-DC Converters With Dynamic Voltage Scaling for Processor Cores (VDD1, VDD2)
  • One Efficient Step-Down DC-DC Converter for I/O Power (VIO)
  • An Interface to Control an External DCDC Converter (EXTCTRL)
  • Eight LDO Voltage Regulators and One RTC LDO (Supply for Internal RTC)
  • One High-Speed I2C Interface for General-Purpose Control Commands (CTL-I2C)
  • Two Independent Enable Signals for Controlling Power Resources (EN1, EN2) Which can be Used as a High-Speed I2C Interface Dedicated for VDD1 and VDD2 Voltage Scaling.
  • Thermal Shutdown Protection and Hot-Die Detection
  • A Real-Time Clock (RTC) Resource with:
    • Fast Start-Up 16.384-MHz Crystal Oscillator
    • Configurable Clock Source from Crystal Oscillator, External 32-kHz Clock or Internal 32-kHz RC Oscillator
    • Date, Time, and Calendar
    • Alarm Capability
  • Nine Configurable GPIOs with Multiplexed Feature Support:
    • Four can be Used as Enable for External Resources, Included into Power-Up Sequence and Controlled by State-Machine
    • As GPI, GPIOs Support Logic-level Detection and Can Generate Maskable Interrupt for Wake-Up
    • Two of the GPIOs Have 10-mA Current Sink Capability for Driving LEDs
    • DCDCs Switching Synchronization Through an External 3-MHz Clock
  • Two Reset Inputs for Cold Reset (HDRST) and a Power-Initialization Reset (PWRDN) for Thermal Reset Input
  • 32-kHz Clock Output (CLK32KOUT) and System Reset (NRESPWRON) Included in Power Sequence
  • Watchdog
  • Two ON and OFF LED-Pulse Generators and One PWM Generator

2 Applications

  • Automotive
  • Infotainment
  • ADAs
  • Instrument Cluster

3 Description

The TPS659119-Q1 device is an integrated power-management IC dedicated to systems using an applications processor requiring multiple power rails. The device provides three step-down converters, one control for an external converter, eight LDOs, and is designed to be flexible for supporting different processors and applications.

Two of the step-down converters provide power for dual-processor cores and support for dynamic voltage scaling by a dedicated I2C interface for optimum power savings. The third converter provides power for inputs and outputs (I/Os) and memory in the system. The control for an external converter can sequence and scale the voltage of an external converter for a high-current rail in the system.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS659119-Q1 HTQFP (80) 12.00 mm × 12.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

TPS659119-Q1 alt_swcs106.gif

4 Revision History

Changes from E Revision (September 2014) to F Revision

  • Deleted Top Specification from title of documentGo
  • Changed the Handling Ratings table to ESD Ratings and moved the storage temperature to the Absolute Maximum Ratings tableGo
  • Added the Receiving Notification of Documentation Updates and Community Resources sections Go

Changes from D Revision (July 2014) to E Revision

  • Updated the PSKIP rows for the TPS659119KBIPFPRQ1 in the EEPROM Configuration tableGo
  • Added column for TPS659119LBIPFP to and removed the TOP-SIDE MARKING row from the EEPROM CONFIGURATION table in the BOOT CONFIGURATION AND SWITCH-ON AND SWITCH-OFF SEQUENCES sectionGo

Changes from C Revision (August 2013) to D Revision

  • Changed CDM classification level from C4A to C4B and updated CDM ESD rating to include corner pin values as well as other pin valuesGo
  • Updated data sheet format to include new document flow and the following new items: Device Information table, Overview section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section (now contains the glossary), Mechanical, Packaging, and Orderable Information section. Also deleted Appendix A: Functional Registers and moved the register map and descriptions to the Detailed Description sectionGo
  • Deleted the PARAMETER and TEST CONDITION column headings from the Absolute Maximum Ratings, Recommended Operating Conditions, and External Component Recommendation tables Go
  • Moved storage temperature range and ESD ratings from the Absolute Maximum Ratings table into the new Handling Ratings table Go
  • Changed the TYP column to NOM in the Recommended Operating Conditions tableGo
  • Replaced Characteristics with Requirements in all timing table titles Go
  • Split the DC output parameter for each LDO into output voltage, step size, and output accuracy and removed multiple TYP values Go
  • Added column for TPS659119KBIPFP (top-side marking) to the EEPROM CONFIGURATION table in the BOOT CONFIGURATION AND SWITCH-ON AND SWITCH-OFF SEQUENCES sectionGo
  • Added pullup resistors to VDDIO on the I2C pins in the Application Schematic imageGo
  • Added T659119KB device marking information to the PACKAGE OPTION ADDENDUM and PACKAGE MATERIALS INFORMATION pages at the end of the documentGo

Changes from B Revision (April 2013) to C Revision

  • Added Storage Temperature range to ABSOLUTE MAXIMUM RATINGS tableGo

Changes from A Revision (April 2013) to B Revision

  • Changed 0x20 to 0x22 for TPS659119HAIPFPRQ1 column in EEPROM Configuration table.Go