SLVSFN7 September 2020 TPS65982DMC
PRODUCTION DATA
The TPS65982DMC is a simple dock management controller (DMC) for USB4 devices. The TPS65982 is capable of managing system power and alternate mode policy for system PD controllers such as the TPS65988DK. The integrated USB low-speed endpoint allows the TPS6598SDMC to provide in-field firmware update functionality for system PD controllers as well as billboard support. The TPS65982DMC may also control an input power adapter switch to soft-start system power and provide input power monitoring.
The TPS65982DMC is divided into four main sections: the adapter power switch, the port-data multiplexer, the power-management circuitry, and the digital core.
The adapter power switch provides power to the system through external switchec controlled by the integrated nFET gate drivers. For a high-level block diagram of the adapter power switch, a description of features, and more detailed circuitry, refer to the Adapter Power Switch section.
The port-data multiplexer connects the internal USB low speed controller to the UFP_USB and DBG_USB pins. For a high-level block diagram of the port-data multiplexer, a description of features, and more detailed circuitry, refer to the USB Type-C Port Data Multiplexer section.
The power-management circuitry receives and provides power to the TPS65982DMC internal circuitry and to the VOUT_3V3 and LDO_3V3 outputs. For a high-level block diagram of the power-management circuitry, a description of features and, more detailed circuitry, refer to the Power Management section.
The digital core provides the engine for managing system policy, processing firmware updates, as well as handling control of all other TPS65982DMC functionality. A small portion of the digital core contains non-volatile memory, called boot code, which is capable of initializing the TPS65982DMC and loading a larger, configurable portion of application code into volatile memory in the digital core. For a high-level block diagram of the digital core, a description of features and, more detailed circuitry, refer to the Digital Core section.
The digital core of the TPS65982DMC also interprets and uses information provided by the analog-to-digital converter ADC (see the ADC section), is configurable to read the status of general purpose inputs and trigger events accordingly, and controls general outputs which are configurable as push-pull or open-drain types with integrated pullup or pulldown resistors and can operate tied to a 1.8 V or 3.3-V rail. The TPS65982DMC is an I2C master to control system PD controllers (see the I2C Slave Interface section), a SPI master to write to and read from an external flash memory (see the SPI Master Interface section), and is programmed by a single-wire debugger (SWD) connection (see the Single-Wire Debugger Interface section).
The TPS65982DMC also integrates a thermal shutdown mechanism (see Thermal Shutdown section) and runs off of accurate clocks provided by the integrated oscillators (see the Oscillators section).