SLVSDM6C October 2016 – August 2021 TPS65983B
PRODUCTION DATA
For all capacitances, the DC voltage must be factored into the derating of ceramic capacitors. Generally the effective capacitance is halved with voltage applied.
VIN_3V3 is connected to VDDIO which ensures that the I/Os of the TPS65983B device are configured to 3.3 V. A 1-µF capacitor is used and is shared between VDDIO and VIN_3V3. LDO_1V8D, LDO_1V8A, and LDO_BMC each have their own 1-µF capacitor. In this design LDO_3V3 powers the external flash of the TPS65983B device and various pullups. A 10-µF capacitor was chosen to support these additional connections. VOUT_3V3 is not used in this design and capacitor is not needed.