SLVSFN9A September   2020  – August 2021 TPS65988DK

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Supply Requirements and Characteristics
    6. 6.6  Power Consumption Characteristics
    7. 6.7  Power Switch Characteristics
    8. 6.8  Cable Detection Characteristics
    9. 6.9  USB-PD Baseband Signal Requirements and Characteristics
    10. 6.10 Thermal Shutdown Characteristics
    11. 6.11 Oscillator Characteristics
    12. 6.12 I/O Characteristics
    13. 6.13 I2C Requirements and Characteristics
    14. 6.14 SPI Controller Timing Requirements
    15. 6.15 HPD Timing Requirements
    16. 6.16 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  USB-PD Physical Layer
        1. 8.3.1.1 USB-PD Encoding and Signaling
        2. 8.3.1.2 USB-PD Bi-Phase Marked Coding
        3. 8.3.1.3 USB-PD Transmit (TX) and Receive (Rx) Masks
        4. 8.3.1.4 USB-PD BMC Transmitter
        5. 8.3.1.5 USB-PD BMC Receiver
      2. 8.3.2  Power Management
        1. 8.3.2.1 Power-On and Supervisory Functions
        2. 8.3.2.2 VBUS LDO
        3. 8.3.2.3 Supply Switch Over
      3. 8.3.3  Port Power Switches
        1. 8.3.3.1 PP_HV Power Switch
          1. 8.3.3.1.1 PP_HV Overcurrent Clamp
          2. 8.3.3.1.2 PP_HV Overcurrent Protection
          3. 8.3.3.1.3 PP_HV OVP and UVP
          4. 8.3.3.1.4 PP_HV Reverse Current Protection
        2. 8.3.3.2 Schottky for Current Surge Protection
        3. 8.3.3.3 PP_EXT Power Path Control
        4. 8.3.3.4 PP_CABLE Power Switch
          1. 8.3.3.4.1 PP_CABLE Overcurrent Protection
          2. 8.3.3.4.2 PP_CABLE Input Good Monitor
        5. 8.3.3.5 VBUS Transition to VSAFE5V
        6. 8.3.3.6 VBUS Transition to VSAFE0V
      4. 8.3.4  Cable Plug and Orientation Detection
        1. 8.3.4.1 Configured as a DFP
        2. 8.3.4.2 Configured as a UFP
        3. 8.3.4.3 Configured as a DRP
        4. 8.3.4.4 Fast Role Swap Signaling
      5. 8.3.5  Dead Battery Operation
        1. 8.3.5.1 Dead Battery Advertisement
        2. 8.3.5.2 BUSPOWER (ADCIN1)
      6. 8.3.6  ADC
      7. 8.3.7  DisplayPort HPD
      8. 8.3.8  Digital Interfaces
        1. 8.3.8.1 General GPIO
        2. 8.3.8.2 I2C
        3. 8.3.8.3 SPI
      9. 8.3.9  Digital Core
      10. 8.3.10 I2C Interfaces
        1. 8.3.10.1 I2C Interface Description
        2. 8.3.10.2 I2C Clock Stretching
        3. 8.3.10.3 I2C Address Setting
        4. 8.3.10.4 Unique Address Interface
        5. 8.3.10.5 I2C Pin Address Setting (ADCIN2)
      11. 8.3.11 SPI Controller Interface
      12. 8.3.12 Thermal Shutdown
      13. 8.3.13 Oscillators
    4. 8.4 Device Functional Modes
      1. 8.4.1 Boot
      2. 8.4.2 Power States
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 USB4 Device Application with Host Charging
        1. 9.2.1.1 Design Requirements
          1. 9.2.1.1.1 Power Supply Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 USB Power Delivery Source Capabilities
          2. 9.2.1.2.2 USB Power Delivery Sink Capabilities
          3. 9.2.1.2.3 Supported Data Modes
          4. 9.2.1.2.4 USB4 Hub Controller & PD Controller I2C Communication
          5. 9.2.1.2.5 Dock Management Controller & PD Controller I2C Communication
          6. 9.2.1.2.6 SPI Flash Options
  10. 10Power Supply Recommendations
    1. 10.1 3.3-V Power
      1. 10.1.1 VIN_3V3 Input Switch
      2. 10.1.2 VBUS 3.3-V LDO
    2. 10.2 1.8-V Power
    3. 10.3 Recommended Supply Load Capacitance
  11. 11Layout
    1. 11.1  Layout Guidelines
    2. 11.2  Layout Example
    3. 11.3  Stack-up and Design Rules
    4. 11.4  Main Component Placement
    5. 11.5  Super Speed Type-C Connectors
    6. 11.6  Capacitor Placement
    7. 11.7  CC1/2 Capacitors & ADCIN1/2 Resistors
    8. 11.8  CC and SBU Protection Placement
    9. 11.9  CC Routing
    10. 11.10 DRAIN1 and DRAIN2 Pad Pours
    11. 11.11 VBUS Routing
    12. 11.12 Completed Layout
    13. 11.13 Power Dissipation
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Firmware Warranty Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Power Switch Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
RPPCCPP_CABLE to C_CCn power switch resistance4.7 ≤ PP_CABLE ≤ 5.5222325
2.95 ≤ PP_CABLE < 4.7269414
RPPHVPP_HVx to VBUSx power switch resistanceTj = 25°C2533
IPPHVContinuous current capabillity of power path from PP_HVx to VBUSxT< 60°C (1)5A
IPPCCContinuous current capabillity of power path from PP_CABLEx to Cx_CCnTJ = 125°C320mA
TJ = 85°C600mA
IHVACTActive quiescent current from PP_HV pin, EN_HV = 1Source Configuration, Comparator RCP function enabled, ILOAD = 100 mA1mA
IHVSDShutdown quiescent current from PP_HV pin, EN_HV = 0VPPHV = 20 V100µA
IOCCOver Current Clamp Firmware Selectable Settings1.1401.2671.393A
1.3801.5331.687A
1.6201.8001.980A
1.8602.0672.273A
2.1002.3332.567A
2.342.6002.860A
2.5802.8673.153A
2.8203.1333.447A
3.0603.4003.74A
3.3003.6674.033A
3.5403.9334.327A
3.7804.2004.620A
4.0204.4674.913A
4.2604.7335.207A
4.5005.005.500A
4.7405.2675.793A
4.9805.5336.087A
5.2205.8006.380A
5.4606.0676.673A
5.6976.3306.963A
IOCPPP_HV Quick Response Current Limit10A
ILIMPPCCPP_CABLE current limit0.60.750.9A
IHV_ACC 1PP_HV current sense accuracyI = 100 mA, Reverse current blocking disabled3.968.1A/V
IHV_ACC 1PP_HV current sense accuracyI = 200 mA4.867.2A/V
IHV_ACC 1PP_HV current sense accuracyI = 500 mA5.2866.72A/V
IHV_ACC 1PP_HV current sense accuracyI ≥ 1 A5.466.6A/V
tON_HVPP_HV path turn on time from enable to VBUS = 95% of PP_HV voltageConfigured as a source or as a sink with soft start disabled. PP_HV = 20 V, CVBUS = 10 µF, ILOAD = 100 mA8ms
tON_FRSPP_HV path turn on time from enable to VBUS = 95% of PP_HV voltage during an FRS enableConfigured as a source. PP_HV = 5 V, CVBUS = 10 µF, ILOAD = 100 mA150μs
tON_CCPP_CABLE path turn on time from enable to C_CCn = 95% of the PP_CABLE voltagePP_CABLE = 5 V, C_CCn = 500 nF, ILOAD = 100 mA2ms
SSConfigurable soft start slew rate for sink configurationILOAD = 100 mA, setting 00.2700.4090.45V/ms
ILOAD = 100 mA, setting 10.60.7871V/ms
ILOAD = 100 mA, setting 21.21.5671.7V/ms
ILOAD = 100 mA, setting 32.33.3883.6V/ms
VREVPHVReverse current blocking voltage threshold for PP_HV switchDiode Mode610mV
Comparator Mode36mV
VSAFE0VVoltage that is a safe 0 V per USB-PD specification00.8V
tSAFE0VVoltage transition time to VSAFE0V650ms
SRPOSMaximum slew rate for positive voltage transitions0.03V/µs
SRNEGMaximum slew rate for negative voltage transitions–0.03V/µs
tSTABLEEN to stable time for both positive and negative voltage transitions275ms
VSRCVALIDSupply output tolerance beyond VSRCNEW during time tSTABLE–0.50.5V
VSRCNEWSupply output tolerance–55%
tVCONNDISTime from cable detach to VVCONNDIS250ms
VVCONNDISVoltage at which VCONN is considered discharged150mV
Allowable ambient temperature is dependant on device board layout. Junction temperature of PPHV switch may not exceed 150C.