SBVS245A October   2014  – March 2015 TPS706

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Shutdown
      3. 7.3.3 Reverse Current Protection
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Capacitor Considerations
      2. 8.1.2 Dropout Voltage
      3. 8.1.3 Transient Response
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
      2. 10.1.2 Power Dissipation
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

10.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance

Input and output capacitors must be placed as close to the device pins as possible. To improve ac performance (such as PSRR, output noise, and transient response), TI recommends that the board be designed with separate ground planes for VIN and VOUT, with the ground plane connected only at the device GND pin. In addition, the output capacitor ground connection must be connected directly to the device GND pin.

10.1.2 Power Dissipation

The ability to remove heat from the die is different for each package type, presenting different considerations in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Thermal Information. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness.

Power dissipation depends on input voltage and load conditions. Power dissipation (PD) can be approximated by the product of the output current times the voltage drop across the output pass element (VIN to VOUT), as shown in Equation 1.

Equation 1. PD = (VIN – VOUT) × IOUT

Figure 33 shows the maximum ambient temperature versus the power dissipation of the TPS706. This figure assumes the device is soldered on a JEDEC standard, high-K layout with no airflow over the board. Actual board thermal impedances vary widely. If the application requires high power dissipation, having a thorough understanding of the board temperature and thermal impedances is helpful to ensure the TPS706 does not operate above a junction temperature of 125°C.

TPS706 D013_SBVS245.gifFigure 33. Maximum Ambient Temperature vs Device Power Dissipation

Estimating the junction temperature can be done by using the thermal metrics ΨJT and ΨJB, shown in the Thermal Information. These metrics are a more accurate representation of the heat transfer characteristics of the die and the package than RθJA. The junction temperature can be estimated with Equation 2.

Equation 2. TPS706 q_new_metrics_bvs066.gif

where

  • PD is the power dissipation shown by Equation 1,
  • TT is the temperature at the center-top of the IC package,
  • TB is the PCB temperature measured 1 mm away from the IC package on the PCB surface.

NOTE

Both TT and TB can be measured on actual application boards using a thermo‐gun (an infrared thermometer).

For more information about measuring TT and TB, see the application note Using New Thermal Metrics (SBVA025), available for download at www.ti.com.

10.2 Layout Examples

TPS706 pcb_layout_wson_bvs245.gifFigure 34. WSON Layout Example
TPS706 pcb_layout_dbv_sbvs245.gifFigure 35. SOT23-5 Layout Example