SBVS047 Data sheet | TI.com

SBVS047I April 2004 – November 2023 TPS715A

PRODUCTION DATA

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)

DRV|6
DRB|8

Thermal pad, mechanical data (Package|Pins)

DRB|8
- QFND058N
DRV|6
- QFND087M

Orderable Information

5.6 Typical Characteristics

at operating temperature T_J = 25°C, V_IN = V_OUT(NOM) + 1.0 V or 2.5 V (whichever is greater), I_OUT = 1 mA, C_IN = 1 µF, and C_OUT = 1 µF (unless otherwise noted)

Figure 5-1 TPS715A33 Output Voltage vs Output Current (Legacy Chip)

Figure 5-3 TPS715A33 Output Voltage vs Input Voltage
(New Chip)

Figure 5-5 Output Voltage vs Junction Temperature (New Chip)

Figure 5-7 Ground Current vs Junction Temperature
(New Chip)

Figure 5-9 Ground Pin Current vs Load Current (New Chip)

Figure 5-11 TPS715A33 Dropout Voltage vs Output Current (New Chip)

Figure 5-13 TPS715A01 Dropout Voltage vs Input Voltage
(New Chip)

Figure 5-15 TPS715A33 Dropout Voltage vs Junction Temperature (New Chip)

Figure 5-17 Output Spectral Noise Density vs Frequency
(New Chip)

Figure 5-19 Output Voltage vs Current Limit (Legacy Chip)

Figure 5-21 Current Limit vs Junction Temperature (New Chip)

Figure 5-23 Power-Supply Ripple Rejection vs Frequency
(New Chip)

Figure 5-25 Power-Up, Power-Down (New Chip)

Figure 5-27 Fast Power-Up (New Chip)

Figure 5-29 Line Transient Response (New Chip)

Figure 5-31 Load Transient Response (New Chip)

Figure 5-33 Dropout Exit Transient Response (New Chip)

Figure 5-2 TPS715A33 Output Voltage vs Output Current
(New Chip)

Figure 5-4 Output Voltage vs Junction Temperature
(Legacy Chip)

Figure 5-6 Ground Current vs Junction Temperature
(Legacy Chip)

Figure 5-8 Ground Pin Current vs Input Voltage (New Chip)

Figure 5-10 TPS715A33 Dropout Voltage vs Output Current (Legacy Chip)

Figure 5-12 TPS715A01 Dropout Voltage vs Input Voltage (Legacy Chip)

Figure 5-14 TPS715A33 Dropout Voltage vs Junction Temperature (Legacy Chip)

Figure 5-16 Output Spectral Noise Density vs Frequency (Legacy Chip)

Figure 5-18 Output Impedance vs Frequency (Legacy Chip)

Figure 5-20 Output Voltage vs Current Limit (New Chip)

Figure 5-22 Power-Supply Ripple Rejection vs Frequency (Legacy Chip)

Figure 5-24 Power-Up and Power-Down (Legacy Chip)

Figure 5-26 Fast Power-Up (Legacy Chip)

Figure 5-28 Line Transient Response (Legacy Chip)

Figure 5-30 Load Transient Response (Legacy Chip)

Figure 5-32 Line Transient Response (New Chip)