SGLS303G May 2005 – December 2024 TPS732-Q1
PRODUCTION DATA
Although an input capacitor is not required for stability, good analog design practice is to connect a 0.1μF to 1μF low ESR capacitor across the input supply near the regulator. This counteracts reactive input sources and improves transient response, noise rejection, and ripple rejection. A higher-value capacitor can be necessary if large, fast rise-time load transients are anticipated or the device is located several inches from the power source.
The TPS732-Q1 family of devices does not require an output capacitor for stability and has maximum phase margin with no capacitor. The devices are designed to be stable for all available types and values of capacitors. In applications where VIN – VOUT < 0.5V and multiple low ESR capacitors are in parallel, ringing can occur when the product of COUT and total ESR drops below 50nF×Ω. Total ESR includes all parasitic resistances, including capacitor ESR and board, socket, and solder joint resistance. In most applications, the sum of capacitor ESR and trace resistance meets this requirement.