SLVSAI3B September   2010  – December 2024 TPS736-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Internal Current Limit
      2. 6.3.2 Transient Response
      3. 6.3.3 Reverse Current
      4. 6.3.4 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Enable Pin and Shutdown
      2. 6.4.2 Dropout Voltage
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Typical Application Circuit for Fixed-Voltage Versions
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 Input And Output Capacitor Requirements
          2. 7.2.1.2.2 Output Noise
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Typical Application Circuit for Adjustable-Voltage Version
        1. 7.2.2.1 Design Requirements
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Example
      2. 7.4.2 Thermal Considerations
      3. 7.4.3 Layout Guidelines
  9. 8 Device And Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, And Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

TPS736-Q1 DBV Package,5-Pin SOT-23(Top View) Figure 4-1 DBV Package,5-Pin SOT-23(Top View)
TPS736-Q1 DCQ Package,6-Pin SOT-223(Top View) Figure 4-2 DCQ Package,6-Pin SOT-223(Top View)
Table 4-1 Pin Functions
PIN I/O DESCRIPTION
NAME NO.
SOT-23 SOT-223
EN 3 5 I Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. See the Enable Pin and Shutdown section for more information. EN can be connected to IN if not used.
FB 4 4 I FB pin for adjustable voltage version only—this is the input to the control loop error amplifier, and is used to set the output voltage of the device.
GND 2 3, 6 — Ground
IN 1 1 I Input supply
NR 4 4 — NR pin for fixed voltage versions only—connecting an external capacitor to this pin bypasses noise generated by the internal band gap, reducing output noise to very low levels.
OUT 5 2 O Output of the regulator. There are no output capacitor requirements for stability.