SBVS038V September   2003  – September 2024 TPS736

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Noise
      2. 6.3.2 Internal Current Limit
      3. 6.3.3 Enable Pin and Shutdown
      4. 6.3.4 Reverse Current
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation with 1.7 V ≤ VIN ≤ 5.5 V and VEN ≥ 1.7 V
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Dropout Voltage
        3. 7.2.2.3 Transient Response
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Power Dissipation
        2. 7.4.1.2 Thermal Protection
        3. 7.4.1.3 Package Mounting
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.3 Application Curves

TPS736 TPS73633 Turn-On Response
Legacy silicon
Figure 7-3 TPS73633 Turn-On Response
TPS736 TPS73633 Load Transient Response
Legacy silicon
Figure 7-5 TPS73633 Load Transient Response
TPS736 TPS73601 RMS Noise Voltage vs CFB
Legacy silicon
Figure 7-7 TPS73601 RMS Noise Voltage vs CFB
TPS736 TPS73601 Load Transient, Adjustable Version
Legacy silicon
Figure 7-9 TPS73601 Load Transient, Adjustable Version
TPS736 TPS73633 Turn-On Response
New silicon, M3 suffix
Figure 7-4 TPS73633 Turn-On Response
TPS736 TPS73633 Load Transient Response
New silicon, M3 suffix
Figure 7-6 TPS73633 Load Transient Response
TPS736 TPS73601 RMS Noise Voltage vs CFB
New silicon, M3 suffix
Figure 7-8 TPS73601 RMS Noise Voltage vs CFB
TPS736 TPS73601 Load Transient, Adjustable Version
New silicon, M3 suffix
Figure 7-10 TPS73601 Load Transient, Adjustable Version