SLVS237E August 1999 – March 2024 TPS766
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
For the adjustable-voltage version device, connect a feed-forward capacitor (CFF) from the OUT pin to the FB pin. CFF improves transient, noise, and PSRR performance, but is not required for regulator stability. Recommended CFF values are listed in the Recommended Operating Conditions table. If a higher capacitance CFF is used, the start-up time increases. For a detailed description of CFF tradeoffs, see the Pros and Cons of Using a Feedforward Capacitor with a Low-Dropout Regulator application note.
CFF and R1 form a zero in the loop gain at frequency fZ, while CFF, R1, and R2 form a pole in the loop gain at frequency fP. Calculate the CFF zero and pole frequencies from the following equations:
CFF ≥ 10pF is required for stability if the feedback divider current is less than 5μA. The following equation calculates the feedback divider current.
To avoid start-up time increases from CFF, limit the product CFF × R1 < 50µs.
For an output voltage of 1.224V with the FB pin tied to the OUT pin, no CFF is used.