SLVS237E August   1999  – March 2024 TPS766

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information (Legacy Chip)
    5. 5.5 Thermal Information (New Chip)
    6. 5.6 Electrical Characteristics
    7. 5.7 Timing Diagram
    8. 5.8 Typical Characteristics
    9. 5.9 Typical Characteristics: Supported ESR Range
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Power-Good Function
      6. 6.3.6 Output Pulldown
      7. 6.3.7 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Adjustable Device Feedback Resistors
        2. 7.2.2.2 Recommended Capacitor Types
        3. 7.2.2.3 Input and Output Capacitor Requirements
        4. 7.2.2.4 Reverse Current
        5. 7.2.2.5 Feed-Forward Capacitor (CFF)
        6. 7.2.2.6 Power Dissipation (PD)
        7. 7.2.2.7 Estimating Junction Temperature
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS766 is a low-dropout (LDO) linear voltage regulator that supports an input voltage range from 2.5V to 16V (new chip) and up to 250mA of load current. For the new chip, the supported output range is from 1.2V to 12V (fixed version) or from 0.8V to 14.6V (adjustable version).

The input voltage range is up to 16V (new chip), which makes the device a good choice for operating from transformer secondary windings and regulated rails (such as 10V or 12V). Additionally, the wide output voltage range allows the device to generate the bias voltage for silicon carbide (SiC) gate drivers and microphones, as well as power microcontrollers (MCUs) and processors.

Wide bandwidth PSRR performance is greater than 70dB at 1kHz and 46dB at 1MHz (new chip), which helps attenuate the switching frequency of an upstream DC/DC converter and minimizes post regulator filtering. The new chip supports internal soft-start circuit mechanism that reduces inrush current during start-up, thus allowing for smaller input capacitance.

The legacy chip supports constant quiescent current across the complete load current range (typically 35μA for the full range of output current, 0mA to 250mA).

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
TPS766 D (SOIC, 8) 4.9mm × 6mm
(1) For more information, see the Mechanical, Packaging, and Orderable Information.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
GUID-20230821-SS0I-W5C4-BWBT-JVGH5BPD6H2S-low.svgTypical Application Circuit
GUID-20231123-SS0I-JMFH-ZWX4-07X8SXKNZZDS-low.svgTPS76633 Dropout voltage vs Temperature (New Chip)

The TPS766 LDO also features a sleep mode, where applying a TTL high signal to EN (enable) shuts down the regulator. In disabled mode, the quiescent current for the legacy chip is less than 1μA (typ) and the quiescent current for the new chip is approximately 1.6μA (typ).

Power-good (PG) is an active-high output used to implement a power-on reset or a low-battery indicator.

For the fixed-output version, The TPS766 provides an output range of 1.5V to 5.0V (legacy chip) and 1.2V to 12V (new chip). For the adjustable version, program the output voltage over the range of 1.25V to 5.5V (legacy chip) and 0.8V to 14.6V (new chip). The TPS766 is available in an 8-pin SOIC package.