SLVS208J May   1999  – August 2015 TPS767

PRODUCTION DATA.  

  1. Features
  2. Description
  3. Revision History
  4. Description (Continued)
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 FB—Pin Connection (adjustable version only)
      2. 9.3.2 Reset Indicator
      3. 9.3.3 Regulator Protection
    4. 9.4 Device Functional Modes
      1. 9.4.1 Minimum Load Requirements
    5. 9.5 Programming
      1. 9.5.1 Programming the TPS76701 Adjustable LDO Regulator
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 External Capacitor Requirements
    2. 10.2 Typical Application
  11. 11Layout
    1. 11.1 Power Dissipation and Junction Temperature
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • PWP|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Power Dissipation and Junction Temperature

Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max).

The maximum-power-dissipation limit is determined using the following equation:

Equation 3. TPS767 Eq03_pdmax_slvs208.gif

Where:

TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal SOIC and
RθJA 32.6°C/W for the 20-terminal PWP with no airflow.
TA is the ambient temperature.

The regulator dissipation is calculated using:

Equation 4. TPS767 Eq04_pd_slvs208.gif

Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit.