SGLS118E December   2001  – July 2024 TPS769-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Dissipation Ratings (Legacy Chip)
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
    8. 5.8 Typical Characteristics: Supported ESR Range
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Adjustable Device Feedback Resistors
        2. 7.2.2.2 Recommended Capacitor Types
        3. 7.2.2.3 Input and Output Capacitor Requirements
        4. 7.2.2.4 Reverse Current
        5. 7.2.2.5 Feed-Forward Capacitor (CFF)
        6. 7.2.2.6 Power Dissipation (PD)
        7. 7.2.2.7 Estimating Junction Temperature
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
        2. 8.1.1.2 Spice Models
        3. 8.1.1.3 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.2.3 Input and Output Capacitor Requirements

Although an input capacitor is not required for stability, good analog design practice is to connect a capacitor from IN to GND. This capacitor counteracts reactive input sources and improves transient response, input ripple, and PSRR. Use an input capacitor if the source impedance is more than 0.5Ω. Use a higher value capacitor if large, fast rise-time, load, or line transients are anticipated. Additionally, use a higher-value capacitor if the device is located several inches from the input power source.

As with most low-dropout regulators, the TPS769-Q1 requires an output capacitor connected between OUT and GND to stabilize the internal control loop.

For the legacy chip, the device requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 4.7µF. Make sure the equivalent series resistance (ESR) of the capacitor is between 0.2Ω and 10Ω to provide stability. Capacitor values larger than 4.7µF are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7µF are not recommended because these components require careful selection of ESR to provide stability. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided these capacitors meet the described requirements. Most of the commercially available 4.7µF surface-mount solid tantalum capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements previously stated. Multilayer ceramic capacitors potentially have very small equivalent series resistances and therefore require the addition of a low value series resistor to provide stability.

For the new chip, the device is designed to be stable using low ESR ceramic capacitors at the input and output. The minimum recommended capacitance value is 2.2μF and the ESR range is up to 2Ω. The supported ESR range depends on the output capacitance, operating junction temperature, and load current conditions. The Section 5.8 describes the supported ESR range in regards to the output capacitance across temperature for the supported load current range.

Dynamic performance of the device is improved by using an output capacitor. Use an output capacitor within the range specified in the Recommended Operating Conditions table for stability.