SGLS118E December   2001  – July 2024 TPS769-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Dissipation Ratings (Legacy Chip)
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
    8. 5.8 Typical Characteristics: Supported ESR Range
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Output Pulldown
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Adjustable Device Feedback Resistors
        2. 7.2.2.2 Recommended Capacitor Types
        3. 7.2.2.3 Input and Output Capacitor Requirements
        4. 7.2.2.4 Reverse Current
        5. 7.2.2.5 Feed-Forward Capacitor (CFF)
        6. 7.2.2.6 Power Dissipation (PD)
        7. 7.2.2.7 Estimating Junction Temperature
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
        2. 8.1.1.2 Spice Models
        3. 8.1.1.3 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS769-Q1 is a low-dropout (LDO) linear voltage regulator. This device supports an input voltage range from 2.5V to 16V (new chip) and up to 100mA of load current. For the new chip, the supported output range is from 1.2V to 5.0V (fixed version) or from 1.2V to 5.5V (adjustable version).

The wide input voltage range makes the device a good choice for operating from regulated rails (such as 10V or 12V). The voltage range is up to 16V for the new chip. This range allows the LDO to generate the bias voltage for a variety of applications. These applications include power microcontrollers (MCUs) and processors, as well as silicon carbide (SiC) gate drivers and microphones.

Wide bandwidth PSRR performance is greater than 70dB at 1kHz and 46dB at 1MHz (new chip). This performance helps attenuate the switching frequency of an upstream DC/DC converter and minimizes post regulator filtering. The new chip supports an internal soft-start circuit mechanism that reduces inrush current during start-up, thus allowing for smaller input capacitance.

Package Information
PART NUMBER PACKAGE(1) PACKAGE SIZE(2)
TPS769-Q1 DBV (SOT-23, 5) 2.9mm × 2.8mm
(1) For more information, see the Mechanical, Packaging, and Orderable Information.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
TPS769-Q1 Typical Application Circuit Typical Application Circuit