SBVS115D August   2008  – January 2015 TPS782

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Active VOUT Pulldown
      3. 7.3.3 Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Dropout Voltage
        3. 8.2.2.3 Transient Response
        4. 8.2.2.4 Minimum Load
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don’ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Protection
    4. 10.4 Power Dissipation
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DDC PACKAGE
TSOT23-5
(TOP VIEW)
po_tsot23_ddc_bvs115.gif
DRV PACKAGE
2-mm x 2-mm SON-6
(TOP VIEW)
po_son_drv_bvs115.gif

Pin Functions

PIN I/O DESCRIPTION
NAME DRV DDC
OUT 1 5 O Regulated output voltage pin. A small (1-μF) ceramic capacitor is needed from this pin to ground to assure stability. See the Input and Output Capacitor Requirements in the Application and Implementation section for more details.
NC 2 No internal connection.
EN 4 3 I Enable pin. Drive this pin over 1.2 V to turn on the regulator. Drive this pin below 0.4 V to put the regulator into shutdown mode, reducing operating current to 18 nA typical.
GND 3, 5 2, 4 Ground pin. Tie all ground pins to ground for proper operation.
IN 6 1 I Input pin. For stable operation, place a small, 0.1-µF capacitor from this pin to ground; typical input capacitor = 1.0 µF. Tie back both input and output capacitor grounds to the IC ground, with no significant impedance between them.
Thermal pad Thermal pad Connect the thermal pad to ground.