SLVS332J March   2001  – December 2016

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Regulator Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Powering Microcontrollers
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 External Capacitor Requirements
        3. 8.2.1.3 Application Curves
  9. 9 Power-Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation and Junction Temperature
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS797xx family of low-dropout (LDO) regulators are optimized for micropower applications. The family features extremely low dropout voltages and ultra-low quiescent current (typically 1.2-µA ).

8.2 Typical Application

8.2.1 Powering Microcontrollers

This device is suited to provide a regulated input voltage and power good (PG) supervisory signal to low-power devices such as mixed-signal microcontrollers. The quiescent (or ground) current of the TPS797xx family is typically 1.2 µA, even at full load; therefore, the reduction in battery life by including the TPS797xx in the system is negligible.

Figure 11 shows an application where the TPS79718 powers TI’s MSP430 mixed signal microcontroller.

Minimal board space is required to accommodate the DCK (SC70) packaged TPS79718, the 0.1-µF output capacitor, the 0.47-µF input capacitor, and the pullup resistor on the PG pin.

TPS79718 TPS797285 TPS79730 TPS79733 ai_micro_pwr_reg_lvs332.gif Figure 11. MSP430 Microcontroller Powered by the TPS79718 Regulator Diagram

8.2.1.1 Design Requirements

Table 2 lists the design parameters for this example.

Table 2. Design Parameters

PARAMETER VALUE
Input voltage range 3.5 V to 5.5 V
Output voltage 3.3 V
Output current rating 50 mA
Minimum output capacitor 0.47 µF

8.2.1.2 Detailed Design Procedure

8.2.1.2.1 External Capacitor Requirements

Although not required, an input bypass capacitor with a value of 0.1-µF or larger (connected between IN and GND and placed close to the TPS797xx) is recommended, especially when a highly resistive power supply is powering the LDO in addition to other devices. Like all low-dropout regulators, the TPS797xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 0.47-µF. Any 0.47-µF capacitor is suitable, and capacitor values larger than 0.47-µF are acceptable.

8.2.1.3 Application Curves

over operating temperature range TJ = –40°C to 85°C, typical values are at TA = 25°C, VI = VO (typical) + 0.5 V or 2 V (whichever is greater); IO = 0.5 mA, VEN = VI, and CO = 1 µF (unless otherwise noted)

TPS79718 TPS797285 TPS79730 TPS79733 tc_pwr_updwn_tm_lvs332.gif
Figure 12. Power Up and Power Down
TPS79718 TPS797285 TPS79730 TPS79733 tc_line_79733_lvs332.gif
Figure 14. TPS79733 Line Transient Response
TPS79718 TPS797285 TPS79730 TPS79733 tc_line_79733_lvs332.gif
Figure 13. TPS79718 Line Transient Response
TPS79718 TPS797285 TPS79730 TPS79733 tc_load_79733_lvs332.gif
Figure 15. TPS79733 Load Transient Response