The TPS7A03 is an ultra-small, ultra-low quiescent current low-dropout linear regulator (LDO) that can source 200 mA with excellent transient performance.
The TPS7A03, with an
ultra-low IQ of 200 nA, is designed specifically for
applications where very-low quiescent current is a critical parameter. This device
maintains low IQ consumption even in dropout mode to further increase
battery life. When in shutdown or disabled mode, the device consumes ultra-low,
3-nA IQ that helps increase the shelf life
of the battery. The TPS7A03 has an output range of 0.8 V to 5.0 V
available in 50-mV steps to support the lower core voltages of modern
microcontrollers (MCUs).
The TPS7A03 features a smart enable circuit with an internally controlled pulldown resistor that keeps the LDO disabled even when the EN pin is left floating and helps minimize the external components used to pulldown the EN pin. This circuit also helps minimize the current drawn through the external pulldown circuit when the device is enabled.
The TPS7A03 is fully specified for TJ = –40°C to +125°C operation.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS7A03 | DQN (X2SON, 4) | 1.00 mm × 1.00 mm |
YCH (DSBGA, 4) | 0.64 mm × 0.64 mm | |
DBV (SOT-23, 5) | 2.90 mm × 1.60 mm |
PIN | I/O(1) | DESCRIPTION | ||
---|---|---|---|---|
NAME | DQN | DBV | ||
EN | 3 | 3 | Input | Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low or floating this pin disables the device. This pin features an internal pulldown resistor, which is disconnected when EN is driven high externally and the device has started up. |
GND | 2 | 2 | — | Ground pin. This pin must be connected to ground on the board. |
IN | 4 | 1 | Input | Input pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground; see the Section 6.3 table. Place the input capacitor as close to the input of the device as possible. |
NC | — | 4 | — | No connect pin. This pin is not internally connected. Connect to ground or leave floating. |
OUT | 1 | 5 | Output | Regulated output pin. A 0.5-µF or greater effective capacitance is required from OUT to ground for stability. For best transient response, use a 1-µF or larger ceramic capacitor from OUT to ground. Place the output capacitor as close to output of the device as possible; see the Section 6.3 table. |
Thermal pad | –– | — | Connect the thermal pad to a large-area ground plane. The thermal pad is internally connect to ground. |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
YCH | NAME | ||
A1 | IN | Input | Input pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground; see the Section 6.3 table. Place the input capacitor as close to input of the device as possible. |
A2 | OUT | Output | Regulated output pin. A 0.5-µF or greater effective capacitance is required from OUT to ground for stability. For best transient response, use a 1-µF or larger ceramic capacitor from OUT to ground. Place the output capacitor as close to output of the device as possible; see the Section 6.3 table. |
B1 | EN | Input | Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low or floating this pin disables the device. This pin features an internal pulldown resistor, which is disconnected when EN is driven high externally and the device has started up. |
B2 | GND | — | Ground pin. This pin must be connected to ground and the thermal pad. |