TPS7A13 300-mA, Low VIN, Low VOUT, Ultra-Low Dropout Regulator

1 Features

Ultra-low input voltage range: 0.7 V to 2.2 V
High efficiency:
- Dropout at 300 mA: 65 mV (max)
- Specified for V_IN = V_OUT + 100 mV
Excellent load transient response:
- 20 mV for I_LOAD 1 mA to 250 mA in 10 μs
Accuracy over load, line, and temperature: 1%
High PSRR: 80 dB at 1 kHz
Available in fixed-output voltages:
- 0.5 V to 2.05 V (in 25-mV steps)
V_BIAS range:
- 2.2 V to 5.5 V
Package:
- 6-pin, 1-mm × 0.71-mm DSBGA
Active output discharge

2 Applications

3 Description

The TPS7A13 is a small, low-dropout regulator (LDO) with excellent transient response. This device can source 300 mA with outstanding ac performance (load and line transient responses). The input voltage range is from 0.7 V to 2.2 V, and the output range is from 0.5 V to 2.05 V with a very high accuracy of 1% over load, line, and temperature.

The primary power path is through the IN pin and can be connected to a power supply as low as 50 mV above the output voltage. All electrical characteristics (including excellent output voltage tolerance, transient response, and PSRR) are specified for input voltages 100 mV greater than the output voltage, thereby yielding high practical efficiency. This regulator supports very low input voltages with the use of a higher, externally supplied V_BIAS rail that is used to power the internal circuitry of the LDO. For example, the supply voltage to the IN pin can be the output of a high-efficiency, DC/DC step-down regulator and the BIAS pin supply voltage can be a rechargeable battery.

The TPS7A13 is equipped with an active pulldown circuit to quickly discharge the output when disabled, and provides a known start-up state.

The TPS7A13 is available in an ultra-small 0.71-mm × 1.0-mm, 6-bump DSBGA package that makes the device suitable for space-constrained applications.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
TPS7A13	DSBGA (6)	0.71 mm × 1.0 mm

(1) For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuit

4 Revision History

Changes from Revision * (December 2021) to Revision A (May 2022)

Changed Functional Block Diagram imageGo

5 Pin Configuration and Functions

Figure 5-1 YCK Package,6-Pin WCSP, 0.35-mm Pitch(Top View)

Table 5-1 Pin Functions

PIN		TYPE	DESCRIPTION
NO.	NAME	TYPE	DESCRIPTION
A1	OUT	Output	Regulated output pin. A 1-µF or greater capacitance is required from OUT to ground for stability. For best transient response, use a 2.2-µF or larger ceramic capacitor from OUT to ground. Place the output capacitor as close to OUT as possible.
A2	IN	Input	Input pin. A 0.75-µF or greater capacitance is required from IN to ground for stability. For good transient response, use a 2.2-µF or larger ceramic capacitor from IN to ground. Place the input capacitor as close to input of the device as possible.
B1	SENSE	Input	SENSE input. This pin is a feedback input to the regulator for SENSE connections. Connecting SENSE to the load helps eliminate voltage errors resulting from trace resistance between OUT and the load.
B2	EN	Input	Enable pin. Driving this pin to logic high enables the LDO. Driving this pin to logic low disables the LDO. If enable functionality is not required, this pin must be connected to IN or BIAS.
C1	GND	—	Ground pin. This pin must be connected to ground.
C2	BIAS	Input	BIAS pin. This pin enables the use of low-input voltage, low-output voltage (LILO) conditions. For best performance, use a 0.1-µF or larger ceramic capacitor from BIAS to ground. Place the bias capacitor as close to BIAS as possible.