SBVS125D August   2010  – June 2015 TPS7A30

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Internal Current Limit
      2. 8.3.2 Programmable Soft-Start
      3. 8.3.3 Enable Pin Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 Dropout Operation
      3. 8.4.3 Disabled
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Adjustable Operation
      2. 9.1.2 Capacitor Recommendations
        1. 9.1.2.1 Input and Output Capacitor Requirements
        2. 9.1.2.2 Noise-Reduction and Feed-Forward Capacitor Requirements
      3. 9.1.3 Maximum AC Performance
      4. 9.1.4 Output Noise
      5. 9.1.5 Power-Supply Rejection
      6. 9.1.6 Transient Response
      7. 9.1.7 Post DC-DC Converter Filtering
      8. 9.1.8 Audio Applications
      9. 9.1.9 Power for Precision Analog
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Do's and Don’ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 11.2 Layout Examples
    3. 11.3 Thermal Considerations
    4. 11.4 Power Dissipation
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 Evaluation Modules
        2. 12.1.1.2 Spice Models
      2. 12.1.2 Device Nomenclature
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DGN Package
8-Pin HVSSOP PowerPAD
Top View
TPS7A30 po_dgn_bvs125.gif
DRB Package
VSON-8
Top View
TPS7A30 po_drb_bvs121.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
DNC 7 — Do not connect. Do not route this pin to any electrical net, not even GND or IN.
EN 5 I This pin turns the regulator on or off. If VEN ≥ VEN(+HI, min) or VEN ≤ VEN(–HI, max), the regulator is enabled. If VEN(+LO, max) ≥ VEN ≥ VEN(–LO, min), the regulator is disabled.
The EN pin can be connected to IN, if not used. |VEN| ≤ |VIN|.
FB 2 I This pin is the feedback pin that sets the output voltage of the device.
GND 4 — Ground
IN 8 I Input supply
NC 3 — Not internally connected. This pin must either be left open or tied to GND.
NR/SS 6 — Noise reduction pin. Connecting an external capacitor to this pin filters the noise generated by the internal band gap. This capacitor allows RMS noise to be reduced to very low levels and also controls the soft-start function.
OUT 1 O Regulator output. A capacitor ≥ 2.2 µF must be tied from this pin to ground to ensure stability.
PowerPAD — — Must either be left open or tied to GND.
Solder to printed-circuit-board (PCB) plane to enhance thermal performance.