The TPS7A47-Q1 device is a positive voltage (35 V), ultra-low-noise (4.2 µVRMS) low-dropout linear regulator (LDO) capable of sourcing a 1-A load.
The TPS7A47-Q1 output voltage can be configured with a user-programmable printed circuit board (PCB) layout (up to 20.5 V), or adjustable (up to 34 V) with external feedback resistors.
The TPS7A47-Q1 is designed with bipolar technology primarily for high-accuracy, high-precision instrumentation applications where clean voltage rails are critical to maximize system performance. This feature makes the device ideal for powering operational amplifiers, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and other high-performance analog circuitry.
In addition, the TPS7A47-Q1 is ideal for post dc-dc converter regulation. By filtering out the output voltage ripple inherent to dc-dc switching conversions, maximum system performance is ensured in sensitive instrumentation, audio, and RF applications.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS7A47-Q1 | VQFN (20) | 5.00 mm × 5.00 mm |
DATE | REVISION | NOTES |
---|---|---|
August 2017 | * | Initial release. |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
0P1V | 12 | I | When connected to GND, this pin adds 0.1 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
0P2V | 11 | I | When connected to GND, this pin adds 0.2 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
0P4V | 10 | I | When connected to GND, this pin adds 0.4 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
0P8V | 9 | I | When connected to GND, this pin adds 0.8 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
1P6V | 8 | I | When connected to GND, this pin adds 1.6 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
3P2V | 6 | I | When connected to GND, this pin adds 3.2 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
6P4V1 | 5 | I | When connected to GND, this pin adds 6.4 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
6P4V2 | 4 | I | When connected to GND, this pin adds 6.4 V to the nominal output voltage of the regulator. Do not connect any voltage other than GND to this pin. If not used, leave this pin floating. |
EN | 13 | I | Enable pin. The device is enabled when the voltage on this pin exceeds the maximum enable voltage, VEN(HI). If enable is not required, tie EN to IN. |
GND | 7 | — | Ground |
IN | 15, 16 | I | Input supply. A capacitor greater than or equal to 1 µF must be tied from this pin to ground to assure stability. A 10-µF capacitor is recommended to be connected from IN to GND (as close to the device as possible) to reduce circuit sensitivity to printed circuit board (PCB) layout, especially when long input traces or high source impedances are encountered. |
NC | 2, 17-19 | — | This pin can be left open or tied to any voltage between GND and IN. |
NR | 14 | — | Noise-reduction pin. When a capacitor is connected from this pin to GND, RMS noise can be reduced to very low levels. A capacitor greater than or equal to 10 nF must be tied from this pin to ground to assure stability. A 1-µF capacitor is recommended to be connected from NR to GND (as close to the device as possible) to maximize ac performance and minimize noise. |
OUT | 1, 20 | O | Regulator output. A capacitor greater than or equal to 10 µF must be tied from this pin to ground to assure stability. A 47-µF ceramic output capacitor is highly recommended to be connected from OUT to GND (as close to the device as possible) to maximize ac performance. |
SENSE/FB | 3 | I | Control-loop error amplifier input. This pin is the SENSE pin if the device output voltage is programmed using ANY-OUT (no external feedback resistors). This pin must be connected to OUT. Connect this pin to the point of load to maximize accuracy. This pin is the FB pin if the device output voltage is set using external resistors. See the Adjustable Operation Adjustable Operation section for more details. |
PowerPAD | Pad | — | Connect the PowerPAD to a large-area ground plane. The PowerPAD™ is internally connected to GND. |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Voltage(2) | IN pin (VI) to GND pin | –0.4 | 36 | V | |
EN pin to GND pin | –0.4 | 36 | |||
EN pin to IN pin | –36 | 0.4 | |||
OUT pin to GND pin | –0.4 | VI + 0.3 | |||
NR pin to GND pin | –0.4 | VI + 0.3(3) | |||
SENSE/FB pin to GND pin | –0.4 | VI + 0.3 | |||
0P1V pin to GND pin | –0.4 | 2.5 | |||
0P2V pin to GND pin | –0.4 | 2.5 | |||
0P4V pin to GND pin | –0.4 | 2.5 | |||
0P8V pin to GND pin | –0.4 | 2.5 | |||
1P6V pin to GND pin | –0.4 | 2.5 | |||
3P2V pin to GND pin | –0.4 | 2.5 | |||
6P4V1 pin to GND pin | –0.4 | 2.5 | |||
6P4V2 pin to GND pin | –0.4 | 2.5 | |||
Current | Peak output | Internally limited | |||
Temperature | Operating virtual junction, TJ | –40 | 145 | °C | |
Storage, Tstg | –65 | 150 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) | ±2500 | V |
Charged-device model (CDM), per AEC Q100-011 | ±500 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VI | Input voltage | 3.0 | 35.0 | V | |
COUT | Output capacitor | 10 | µF | ||
V+EN(HI) | Enable high-level voltage | 2.0 | VI | V | |
V+EN(LO) | Enable low-level voltage | 0 | 0.4 | V | |
IO | Output current | 0 | 1.0 | A | |
TJ | Operating junction temperature | –40 | 145 | °C |
THERMAL METRIC(1) | TPS7A47-Q1 | UNIT | |
---|---|---|---|
RGW (VQFN) | |||
20 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 31.1 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 21.1 | °C/W |
RθJB | Junction-to-board thermal resistance | 10.2 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.2 | °C/W |
ψJB | Junction-to-board characterization parameter | 10.2 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 1.9 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
VUVLO | Undervoltage lockout threshold | VI rising | 2.67 | V | ||||
VI falling | 2.5 | |||||||
V(REF) | Reference voltage | V(REF) = V(FB), | 1.4 | V | ||||
VUVLO(HYS) | Under-voltage lockout hysteresis | 177 | mV | |||||
VNR | Noise reduction pin voltage | Using ANY-OUT option | VOUT | V | ||||
In adjustable mode only | 1.4 | |||||||
VO | Output voltage range | COUT = 20 µF, using ANY-OUT option | 1.4 | 20.5 | V | |||
COUT = 20 µF, using adjustable option | 1.4 | 34 | ||||||
Nominal VO accuracy | TJ = 25°C, COUT = 20 µF | –1.0 | 1.0 | %VO | ||||
Overall VO accuracy | VO(nom) + 1.0 V ≤ VI ≤ 35 V, 0 mA ≤ IO ≤ 1 A, COUT = 20 µF |
–2.5 | 2.5 | %VO | ||||
ΔVO(ΔVI) | Line regulation | VO(nom) + 1.0 V ≤ VI ≤ 35 V | 0.092 | %VO | ||||
ΔVO(ΔIO) | Load regulation | 0 mA ≤ IO ≤ 1 A | 0.3 | %VO | ||||
V(DO) | Dropout voltage | VI = 95% VO(nom), IO = 0.5 A | 216 | mV | ||||
VI = 95% VO(nom), IO = 1 A | 307 | 450 | ||||||
I(CL) | Current limit | VO = 90% VO(nom) | 1 | 1.26 | A | |||
I(GND) | Ground pin current | IO = 0 mA | 0.58 | 1.0 | mA | |||
IO = 1 A | 6.1 | |||||||
I(EN) | Enable pin current | VEN = VI | 0.78 | 2 | µA | |||
VI = VEN = 35 V | 0.81 | 2 | ||||||
I(SHDN) | Shutdown supply current | VEN = 0.4 V | 2.55 | 8 | µA | |||
VEN = 0.4 V, VI = 35 V | 3.04 | 60 | ||||||
I(FB) | Feedback pin current | 350 | nA | |||||
PSRR | Power-supply rejection ratio | VI = 16 V, VO(nom) = 15 V, COUT = 50 µF, IO = 500 mA, CNR = 1 µF, f = 1 kHz |
78 | dB | ||||
Vn | Output noise voltage | VI = 3 V, VO(nom) = 1.4 V, COUT = 50 µF, CNR = 1 µF, BW = 10 Hz to 100 kHz |
4.17 | µVRMS | ||||
VIN = 6 V, VO(nom) = 5 V, COUT = 50 µF, CNR = 1 µF, BW = 10 Hz to 100 kHz |
4.67 | |||||||
Tsd | Thermal shutdown temperature | Shutdown, temperature increasing | 170 | °C | ||||
Reset, temperature decreasing | 150 |
IOUT = 500 mA, COUT = 50 µF, CNR = 1 µF, BWRMSNOISE (10 Hz, 100 kHz) |
IOUT = 1 A, COUT = 50 µF, VIN = 3 V, VOUT = 1.4 V |
CNR = 1 µF, COUT = 50 µF, VIN = 3 V, VOUT = 1.4 V |
VOUT = 3.3 V, CNR = 1 µF, COUT = 50 µF, IOUT = 500 mA |
CNR = 1 µF, COUT = 50 µF, IOUT = 500 mA |
VIN = 5 V, VOUT = 3.3 V, IOUT = 10 mA to 845 mA |
Startup time = 65 ms, VIN = 6 V, VOUT = 5V, IOUT = 500 mA, CIN = 10 µF, COUT = 50 µF |
IOUT = 0 µA |
VOUT = 90% VOUT(NOM) |
IOUT = 0.5 A, COUT = 50 µF, VIN = 3 V, VOUT = 1.4 V |
VOUT = 3.3 V, CNR = 1 µF, COUT = 50 µF, IOUT = 50 mA |
VOUT = 3.3 V, CNR = 1 µF, COUT = 50 µF, IOUT = 1 A |
CNR = 1 µF, COUT = 50 µF, IOUT = 1000 mA |
VIN = 5 V to 15 V, VOUT = 3.3 V, IOUT = 845 mA |
VOUT = 4.7 V, COUT = 10 µF, CNR = 1 µF, BWRMSNOISE (10 Hz, 100 kHz) |