SLVSA62J March   2010  – March 2020 TPS7A60-Q1 , TPS7A61-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Programmable Reset Delay Option
      2.      Enable Option
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Reset Delay and Reset Output
      2. 8.3.2 Charge Pump Operation
      3. 8.3.3 Undervoltage Shutdown
      4. 8.3.4 Low-Voltage Tracking
      5. 8.3.5 Integrated Fault Protection
      6. 8.3.6 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Low-Power Mode
      2. 8.4.2 Sleep Mode (TPS7A61-Q1 Only)
      3. 8.4.3 Regulation Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPS7A60-Q1 Typical Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Input Capacitor
          2. 9.2.1.2.2 Output Capacitor
        3. 9.2.1.3 Application Curve
      2. 9.2.2 TPS7A61-Q1 Typical Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Power Dissipation and Thermal Considerations
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

VIN = 14 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT VOLTAGE (VIN PIN)
VIN Input voltage Fixed 5-V or 3.3-V output, IOUT = 1 mA 7(1) 40 V
IQUIESCENT Quiescent current VIN = 8.2 V to 18 V, VENABLE(2) = 5 V,
IOUT = 0.01 mA to 0.75 mA		 25 40 µA
ISLEEP(2) Sleep or shutdown current VIN = 8.2 V to 18 V, VENABLE(2) < 0.8 V,
IOUT = 0 mA (no load), TA = 125°C		 3 µA
VIN-UVLO Undervoltage lockout voltage Ramp VINdown until output is turned OFF 3.16 V
VIN(POWERUP) Power-up voltage Ramp VINup until output is turned ON 3.45 V
ENABLE INPUT (ENABLE PIN)
VIL(2) Logic input low level 0 0.8 V
VIH(2) Logic input high level 2.5 40 V
REGULATED OUTPUT VOLTAGE (VOUT PIN)
VOUT Regulated output voltage Fixed VOUT value (3.3 V or 5 V as applicable),
IOUT = 10 mA to 300 mA, VIN= VOUT + 1 V to 16 V 		–2% 2%
∆VLINE-REG Line regulation VIN = 6 V to 28 V, IOUT = 10 mA, VOUT = 5 V 15 mV
VIN = 6 V to 28 V, IOUT = 10 mA, VOUT = 3.3 V 20 mV
∆VLOAD-REG Load regulation IOUT = 10 mA to 300 mA, VIN= 14 V, VOUT = 5 V 25 mV
IOUT = 10 mA to 300 mA, VIN = 14 V, VOUT = 3.3 V 35 mV
VDROPOUT(2) Dropout voltage
(VIN – VOUT)		 IOUT = 250 mA 500 mV
IOUT = 150 mA 300 mV
RSW Switch resistance VIN to VOUT resistance 2 Ω
ICL Output current limit VOUT = 0 V (VOUT pin is shorted to ground) 350 1000 mA
PSRR Power supply ripple rejection VIN-RIPPLE = 0.5 Vpp, IOUT = 300 mA, frequency = 100 Hz, VOUT = 5 V and VOUT = 3.3 V 60 dB
VIN-RIPPLE = 0.5 Vpp, IOUT = 300 mA, frequency = 150 kHz, VOUT = 5 V and VOUT = 3.3 V 30
RESET (nRST PIN)
VOL Reset pulled low IOL = 5 mA 0.4 V
IOH Leakage current Reset pulled to VOUT through 5-kΩ resistor 1 µA
VTH(POR) Power-on-reset threshold VOUT power up above internally set tolerance,
VOUT = 5 V		 4.5 4.65 4.77 V
VOUT power up above internally set tolerance,
VOUT = 3.3 V		 3.07
UVTHRES Reset threshold VOUT falling below internally set tolerance,
VOUT = 5 V		 4.5 4.65 4.77 V
VOUT falling below internally set tolerance,
VOUT = 3.3 V		 3.07
RESET DELAY (RDELAY PIN)
VTH(RDELAY)(3) Threshold to release nRST high Voltage at RDELAY pin is ramped up. 3 3.3 V
IDLY(3) Delay capacitor charging current 0.75 1 1.25 µA
IOL(3) Delay capacitor discharging current Voltage at RDELAY pin = 1 V 5 mA
OPERATING TEMPERATURE RANGE
TJ Operating junction temperature –40 150 ºC
TSHUTDOWN Thermal shutdown trip point 165 ºC
THYST Thermal shutdown hysteresis 10 ºC
(1) VIN can go down to 4 V for 130 ms or less and remain functional. If VIN is less than 7 V for longer than 130 ms, then some devices can turn off until the input voltage rises above 7 V.
(2) This test is done with VOUT in regulation and VIN – VOUT parameter is measured when VOUT (3.3 V or 5 V) drops by 100 mV at specified loads.