SLVSAA0E November   2010  – March 2020 TPS7A6201-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Regulator Stability
      2.      Application Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Up
      2. 7.3.2 Adjustable Output Voltage
      3. 7.3.3 Enable Input
      4. 7.3.4 Charge Pump Operation
      5. 7.3.5 Undervoltage Shutdown
      6. 7.3.6 Low Voltage Tracking
      7. 7.3.7 Integrated Fault Protection
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Low Power Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor
        2. 8.2.2.2 Output Capacitor
        3. 8.2.2.3 Feedback Resistor
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Power Dissipation and Thermal Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • KTT|5
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.2 Adjustable Output Voltage

The regulated output voltage (VOUT) can be programmed by connecting external resistors to FB pin. Calculate the feedback resistor values using Equation 1.

Equation 1. TPS7A6201-Q1 eq_vout_adj_lvsaa0.gif

where

  • VOUT = desired output voltage
  • VREF = reference voltage (VREF = 1.23 V typically)
  • R1, R2 = feedback resistors (see the Functional Block Diagram)

The overall tolerance of the regulated output voltage depends on the tolerance of internal reference voltage and external feedback resistors, and is given by Equation 2.

Equation 2. TPS7A6201-Q1 eq_tolvout_lvsaa0.gif

where

  • tolVOUT = tolerance of output voltage
  • tolVREF = tolerance of internal reference voltage (tolVREF = ±1.5% typically)
  • tolR1,tolR2 = tolerance of feedback resistors R1, R2

For a tighter tolerance on VOUT, select lower-value feedback resistors. TI recommends selecting feedback resistors such that the sum of R1 and R2 is between 20 kΩ and 200 kΩ.