SBVS136G March   2012  – October 2023 TPS7A7200

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configurations
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 User-Configurable Output Voltage
      2. 6.3.2 Traditional Adjustable Configuration
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Soft-Start
      5. 6.3.5 Current Limit
      6. 6.3.6 Enable
      7. 6.3.7 Power-Good
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ANY-OUT Programmable Output Voltage
        2. 7.2.2.2 Traditional Adjustable Output Voltage
        3. 7.2.2.3 Input Capacitor Requirements
        4. 7.2.2.4 Output Capacitor Requirements
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Considerations
        2. 7.4.1.2 Power Dissipation
        3. 7.4.1.3 Estimating Junction Temperature
      2. 7.4.2 Layout Example
  9. 8 Device And Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, And Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • RGW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.7 Power-Good

The TPS7A7200 has a power-good function that works with the PG output pin. When the output voltage undershoots the threshold voltage VIT(PG) during normal operation, the PG open-drain output turns from a high-impedance state to a low-impedance state. When the output voltage exceeds the VIT(PG) threshold by an amount greater than the PG hysteresis, Vhys(PG), the PG open-drain output turns from a low-impedance state to high-impedance state. By connecting a pullup resistor (usually between the OUT and PG pins), any downstream device can receive an active-high enable logic signal.

When setting the output voltage to less than 1.8 V and using a pullup resistor between OUT and PG pins, depending on the downstream device specifications, the downstream device can possibly be unable to accept the PG output as a valid high-level logic voltage. In such cases, place a pullup resistor between the IN and PG pins, not between the OUT and PG pins.

Figure 5-18 illustrates the open-drain output drive capability. The on-resistance of the open-drain transistor is calculated using Figure 5-18, and is approximately 200 Ω. Any pullup resistor greater than 10 kΩ works fine for this purpose.