SBVS136G March   2012  – October 2023 TPS7A7200

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configurations
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 User-Configurable Output Voltage
      2. 6.3.2 Traditional Adjustable Configuration
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Soft-Start
      5. 6.3.5 Current Limit
      6. 6.3.6 Enable
      7. 6.3.7 Power-Good
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ANY-OUT Programmable Output Voltage
        2. 7.2.2.2 Traditional Adjustable Output Voltage
        3. 7.2.2.3 Input Capacitor Requirements
        4. 7.2.2.4 Output Capacitor Requirements
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Considerations
        2. 7.4.1.2 Power Dissipation
        3. 7.4.1.3 Estimating Junction Temperature
      2. 7.4.2 Layout Example
  9. Device And Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, And Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • RGW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Input Capacitor Requirements

As a result of the very fast transient response and low-dropout operation support, the line impedance must be reduced at the input pin of the TPS7A7200. The line impedance depends heavily on various factors, such as wire (PCB trace) resistance, wire inductance, and output impedance of the upstream voltage supply (power supply to the TPS7A7200). Therefore, a specific value for the input capacitance cannot be recommended until the previously listed factors are finalized.

In addition, simple usage of large input capacitance can form an unwanted LC resonance in combination with input wire inductance. For example, a 5-nH inductor and a 10-µF input capacitor form an LC filter that has a resonance at 712 kHz. This value of 712 kHz is well inside the bandwidth of the TPS7A7200 control loop.

The best guideline is to use a capacitor of up to 1 µF with well-designed wire connections (PCB layout) to the upstream supply. If optimizing the input line is difficult, use a large tantalum capacitor in combination with a good-quality, low-ESR, 1-µF ceramic capacitor.