SBVS136G March   2012  – October 2023 TPS7A7200

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configurations
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 User-Configurable Output Voltage
      2. 6.3.2 Traditional Adjustable Configuration
      3. 6.3.3 Undervoltage Lockout (UVLO)
      4. 6.3.4 Soft-Start
      5. 6.3.5 Current Limit
      6. 6.3.6 Enable
      7. 6.3.7 Power-Good
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ANY-OUT Programmable Output Voltage
        2. 7.2.2.2 Traditional Adjustable Output Voltage
        3. 7.2.2.3 Input Capacitor Requirements
        4. 7.2.2.4 Output Capacitor Requirements
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Thermal Considerations
        2. 7.4.1.2 Power Dissipation
        3. 7.4.1.3 Estimating Junction Temperature
      2. 7.4.2 Layout Example
  9. 8 Device And Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, And Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
  • RGW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.5 Electrical Characteristics

over operating temperature range (TJ = –40°C to 125°C), 1.425 V ≤ VIN ≤ 6.5 V, VIN ≥ VOUT(TARGET) + 0.3 V or
VIN ≥ VOUT(TARGET) + 0.5 V(1)(2), OUT connected to 50 Ω to GND(4),VEN = 1.1 V, COUT = 10 μF, CSS = 10 nF, CFF = 0 pF (RGW package), CFF = 220 pF (RGT package)(8), and PG pin pulled up to VIN with 100 kΩ, 27 kΩ ≤ R2 ≤ 33 kΩ for adjustable configuration(3) (unless otherwise noted); typical values are at TJ = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range 1.425 6.5 V
V(SS) SS pin voltage 0.5 V
VOUT Output voltage range Adjustable with external feedback resistors 0.9 5 V
Fixed with voltage setting pins 0.9 3.5
Output voltage accuracy(5)(6) RGT package only, adjustable, –40°C ≤ TA ≤ 85°C,
25 mA ≤ IOUT ≤ 2 A		 –1.5% 1.5%
RGT package only, fixed, –40°C ≤ TA ≤ 85°C,
25 mA ≤ IOUT ≤ 2 A		 –2% 2%
Adjustable, 25 mA ≤ IOUT ≤ 2 A –2% 2%
Fixed, 25 mA ≤ IOUT ≤ 2 A –3% 3%
ΔVO(ΔVI) Line regulation IOUT = 25 mA 0.01 %/V
ΔVO(ΔIO) Load regulation 25 mA ≤ IOUT ≤ 2 A 0.1 %/A
V(DO) Dropout voltage (7) VOUT ≤ 3.3 V, IOUT = 2 A, V(FB) = GND 180 mV
3.3 V < VOUT, IOUT = 2 A, V(FB) = GND 470
I(LIM) Output current limit VOUT forced at 0.9 × VOUT(TARGET), VIN = 3.3 V, VOUT(TARGET) = 0.9 V 2.4 3.1 A
I(GND) GND pin current Full load, IOUT = 2 A 2.6 mA
Minimum load, VIN = 6.5 V,
VOUT(TARGET) = 0.9 V, IOUT = 25 mA		 4
Shutdown, PG = (open), VIN = 6.5 V,
VOUT(TARGET) = 0.9 V, V(EN) < 0.5 V		 0.1 5 μA
I(EN) EN pin current VIN = 6.5 V, V(EN) = 0 V and 6.5 V ±0.1 μA
VIL(EN) EN pin low-level input voltage (disable device) 0 0.5 V
VIH(EN) EN pin high-level input voltage (enable device) 1.1 6.5 V
VIT(PG) PG pin threshold For the direction PG↓ with decreasing VOUT 0.85VOUT 0.9VOUT 0.96VOUT V
Vhys(PG) PG pin hysteresis For PG↑ 0.02VOUT V
VOL(PG) PG pin low-level output voltage VOUT < VIT(PG), IPG = –1 mA (current into device) 0.4 V
Ilkg(PG) PG pin leakage current VOUT > VIT(PG), V(PG) = 6.5 V 1 μA
I(SS) SS pin charging current V(SS) = GND, VIN = 3.3 V 3.5 5.1 7.2 μA
Vn Output noise voltage BW = 100 Hz to 100 kHz,
VIN = 1.5 V, VOUT = 1.2 V, IOUT = 2 A		 40.65 μVRMS
Tsd Thermal shutdown temperature Shutdown, temperature increasing 160 °C
Reset, temperature decreasing 140
TJ Operating junction temperature –40 125 °C
(1) When VOUT ≤ 3.5 V, VIN ≥ (VOUT + 0.3 V) or 1.425 V, whichever is greater; when VOUT > 3.5 V, VIN ≥ (VOUT + 0.5 V).
(2) VOUT(TARGET) is the calculated target VOUT value from the output voltage setting pins: 50mV, 100mV, 200mV, 400mV, 800mV, and 1.6V in fixed configuration, or the expected VOUT value set by external feedback resistors in adjustable configuration.
(3) R2 is the bottom-side of the feedback resistor between the FB pin and OUT. See the Traditional Adjustable Configuration section for details.
(4) This 50-Ω load is disconnected when the test conditions specify an IOUT value.
(5) When the TPS7A7200 is connected to external feedback resistors at the FB pin, external resistor tolerances are not included.
(6) The TPS7A7200 is not tested at VOUT = 0.9 V, 2.7 V ≤ VIN ≤ 6.5 V, and 500 mA ≤ IOUT ≤ 2 A because the power dissipation is higher than the maximum rating of the package. Also, this accuracy specification does not apply on any application condition that exceeds the power dissipation limit of the package.
(7) V(DO) is not defined for output voltage settings less than 1.2 V.
(8) CFF is the capacitor between FB pin and OUT.