SBVS416B May   2022  – August 2022 TPS7A74

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Shutdown
      2. 7.3.2 Active Discharge
      3. 7.3.3 Global Undervoltage Lockout (UVLO) Circuit
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Thermal Shutdown Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
    5. 7.5 Programming
      1. 7.5.1 Programmable Soft-Start
      2. 7.5.2 Sequencing Requirements
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjusting the Output Voltage
      2. 8.1.2 Input, Output, and Bias Capacitor Requirements
      3. 8.1.3 Transient Response
      4. 8.1.4 Dropout Voltage
      5. 8.1.5 Output Noise
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 FPGA I/O Supply at 1.8 V With a Bias Rail
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Estimating Junction Temperature
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Modules
        2. 9.1.1.2 Spice Models
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Typical Characteristics

at TJ = 25°C, VIN = VOUT(nom) + 0.3 V, VBIAS = 5 V, VEN = VIN, CIN = 10 μF, CBIAS = 1 μF, and COUT = 10 μF (unless otherwise noted)

GUID-20220315-SS0I-WKZV-H1ZM-8SKDVQMVVRGM-low.png
CIN = 0 μF, COUT = 10 μF, CBIAS = 1 μF
Figure 6-1 PSRR vs Frequency and Overhead (OvHd) Voltage for IOUT = 400 mA, VOUT = 1.8 V
GUID-20220315-SS0I-VJVT-4GNP-JM7CG5CNRQT9-low.png
CIN = 0 μF, COUT = 10 μF, CBIAS = 1 μF
Figure 6-3 PSRR vs Frequency and Overhead (OvHd) Voltage for IOUT = 1.1 A, VOUT = 1.8 V
GUID-20220315-SS0I-XFPQ-XNV4-RMZNRVCDDMQP-low.png
CIN = 0 μF, COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A
Figure 6-5 PSRR vs Frequency and COUT for VOUT = 1.8 V
GUID-20220331-SS0I-FVQG-TDTS-39SPTKG4WHZ8-low.png
VIN = VOUT + 0.3 V, CBIAS = 0 μF, CIN = COUT = 10 μF,
CBIAS = 1 μF
Figure 6-7 Bias Rail PSRR vs Frequency and IOUT
GUID-20220315-SS0I-HD1C-NQPX-BSLPCQ1RG15F-low.png
CIN = COUT = 10 μF, CBIAS = 1 μF
 
Figure 6-9 Noise vs Frequency and IOUT for VOUT = 3.3 V
GUID-20220315-SS0I-3KBV-BTZK-GPCMPXTV29B8-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 10 mA to 1.5 A to
10 mA at 1 A/μs
Figure 6-11 Load Transient for VOUT = 3.3 V
GUID-20220315-SS0I-RV0G-WJ9Q-5CVWZPJGT6VB-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A,
VIN = 3.9 V to 5.8 V to 3.9 V at 1 V/μs
Figure 6-13 Line Transient for VOUT = 3.3 V
GUID-20220315-SS0I-ZZN4-RS3M-CQFNXXM55XW4-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A, VIN = 1.1 V, VBIAS = 5 V
Figure 6-15 Input Ramp With Fast Soft-Start
GUID-20220607-SS0I-QF3R-RRZC-BBFRL8HJZ55N-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V, VEN = 1.1 V
Figure 6-17 IN Line Regulation for VOUT = 0.65 V, IOUT = 10 mA
GUID-20220607-SS0I-1NLR-XQZ3-13LD0RMKP6SS-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 0.95 V, VEN = 1.1 V
Figure 6-19 BIAS Line Regulation for VOUT = 0.65 V, IOUT = 0 A
GUID-20220607-SS0I-BDGM-3LSP-SQ69PGTN3VV2-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 0.95 V, VEN = 1.1 V
Figure 6-21 BIAS Line Regulation for VOUT = 0.65 V, IOUT = 1.5 A
GUID-20220607-SS0I-1PLP-KTWG-VPC3NWSHGFMP-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V, VEN = 1.1 V
Figure 6-23 IN Line Regulation for VOUT = 3.3 V, IOUT = 10 mA
GUID-20220607-SS0I-PWBC-NRCM-BFH2BMFH1X0J-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF,
3.6 V ≤ VIN ≤ 6 V, VEN = 1.1 V
Figure 6-25 BIAS Line Regulation for VOUT = 3.3 V, IOUT = 0 A
GUID-20220607-SS0I-GF86-J9LP-ZHFFBXQNHRQM-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF,
3.6 V ≤ VIN ≤ 6 V, VEN = 1.1 V
Figure 6-27 BIAS Line Regulation for VOUT = 3.3 V, IOUT = 1.5 A
GUID-20220607-SS0I-V25F-WKB8-BRGRQCKTZFV3-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 0.95 V, VBIAS = 5 V, VEN = 1.1 V
Figure 6-29 Load Regulation for IOUT = 0 A to Load, VOUT = 3.3 V
GUID-20220607-SS0I-FVPN-CDB0-MKNJSV9L0XDR-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 0.95 V, VBIAS = 5 V, VEN = 1.1 V
Figure 6-31 Load Regulation for IOUT = 10 mA to Load,
VOUT = 3.3 V
GUID-20220613-SS0I-M6Q3-CPW2-MLM8SVDZQHWX-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = VIN, VEN = 1.1 V
Figure 6-33 Dropout Voltage vs Bias Voltage for IOUT = 0 A
GUID-20220613-SS0I-MVQS-C0QV-L6KNL1LTZTPM-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = VIN, VEN = 1.1 V
Figure 6-35 Dropout Voltage vs Bias Voltage for IOUT = 500 mA
GUID-20220613-SS0I-QMV0-CQCD-BLZCGQKR0VVD-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = VIN =
6 V, VOUT = 0.65 V, VEN = 1.5 V, IOUT = 0 A
Figure 6-37 Soft-Start Current vs Temperature
GUID-20220613-SS0I-3NNV-NMST-ZDCQ6F8CBP3C-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VEN = 1.1 V
Figure 6-39 Current Limit vs Bias Voltage for VOUT = 3.3 V
GUID-20220613-SS0I-NZLW-WV5P-WGQLCMDHP9HL-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VEN = 0.4 V
Figure 6-41 Shutdown Current vs Bias Voltage for VIN = 6 V
GUID-20220613-SS0I-CPMF-BQHH-GRBPRRQDWLGF-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 6 V
 
Figure 6-43 Enable Voltage Hysteresis vs Temperature
GUID-20220613-SS0I-WDFJ-5DKC-1NCXT6VT1JJW-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V,
1.1 V ≤ VEN ≤ 6 V
Figure 6-45 UVLOIN Voltage Hysteresis vs Temperature
GUID-20220613-SS0I-94LN-J1N7-H2ZRXSGXTBDB-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V,
1.1 V ≤ VEN ≤ 6 V
Figure 6-47 UVLOBIAS Voltage Hysteresis vs Temperature
GUID-20220613-SS0I-JZSN-DWT7-9JG46D6HNMQN-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 6 V, VOUT(NOM) = 0.65 V, VBIAS = 6 V, IOUT = 2 mA, VEN = 6 V
Figure 6-49 EN Pin Current vs Temperature
GUID-20220613-SS0I-BVQS-CMZ6-FVF32SS3LF2D-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VOUT = 3.3 V, VEN = 1.1 V
Figure 6-51 BIAS Pin Quiescent Current vs Bias Voltage for IOUT = 1.5 A
GUID-20220613-SS0I-G6HC-ZGQQ-X0TFNVGRVQ2R-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VOUT = 3.3 V, VEN = 1.1 V
Figure 6-53 BIAS Pin Quiescent Current vs Bias Voltage for IOUT = 10 mA
GUID-20220613-SS0I-MJ5M-M74W-2HFG2632LLBW-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VOUT = 3.3 V, VEN = 1.1 V
Figure 6-55 BIAS Pin Quiescent Current vs Bias Voltage for IOUT = 0 A
GUID-20220613-SS0I-JL5H-XNVQ-LSDHRBHRVQP6-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VOUT = 3.3 V, VBIAS = 5 V, VEN = 1.1 V
Figure 6-57 BIAS Pin Quiescent Current vs Temperature
GUID-20220315-SS0I-9GWF-8Z1J-KS2GG2ZQ4K37-low.png
CIN = 0 μF, COUT = 10 μF, CBIAS = 1 μF
Figure 6-2 PSRR vs Frequency and Overhead (OvHd) Voltage for IOUT = 750 mA, VOUT = 1.8 V
GUID-20220315-SS0I-0QGB-T0QH-2QZ65M31HQHJ-low.png
CIN = 0 μF, COUT = 10 μF, CBIAS = 1 μF
Figure 6-4 PSRR vs Frequency and Overhead (OvHd) Voltage for IOUT = 1.5 A, VOUT = 1.8 V
GUID-20220315-SS0I-MKVL-9XRT-S5WPZJNFVP8N-low.png
CIN = 0 μF, COUT = 10 μF, CBIAS = 1 μF
Figure 6-6 PSRR vs Frequency and IOUT for VOvHd = 200 mV
GUID-20220315-SS0I-HD1C-NQPX-BSLPCQ1RG15F-low.png
CIN = COUT = 10 μF, CBIAS = 1 μF
 
Figure 6-8 Noise vs Frequency and IOUT for VOUT = 0.65 V
GUID-20220315-SS0I-0PMT-9XQ8-Q4X2RNLXXLZ9-low.png
CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 10 mA to 1.5 A to
10 mA at 1 A/μs
Figure 6-10 Load Transient for VOUT = 0.65 V
GUID-20220315-SS0I-51HL-3TPZ-3KWNWSGK6KZ4-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A,
VIN = 0.95 V to 6 V to 0.95 V at 1 V/μs
Figure 6-12 Line Transient for VOUT = 0.65 V
GUID-20220315-SS0I-Z0QC-WKNH-V217BJ306WR8-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A, VBIAS = 5 V
 
Figure 6-14 Input Ramp-Up and Ramp-Down
GUID-20220607-SS0I-LMBS-CBJ1-QRW5WDWKVPMD-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V, VEN = 1.1 V
Figure 6-16 IN Line Regulation for VOUT = 0.65 V, IOUT = 0 A
GUID-20220607-SS0I-1WKC-WRVF-WVK4GWQHVQ7Q-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V, VEN = 1.1 V
Figure 6-18 IN Line Regulation for VOUT = 0.65 V, IOUT = 1.5 A
GUID-20220607-SS0I-4CTT-1BK1-RLDHRPF4RJJ5-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 0.95 V, VEN = 1.1 V
Figure 6-20 BIAS Line Regulation for VOUT = 0.65 V,
IOUT = 10 mA
GUID-20220607-SS0I-GQ9K-GCL7-W0DZ4QHWJL34-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V, VEN = 1.1 V
Figure 6-22 IN Line Regulation for VOUT = 3.3 V, IOUT = 0 A
GUID-20220607-SS0I-T84R-ZWLT-SBRBNJJT9GT2-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V, VEN = 1.1 V
Figure 6-24 IN Line Regulation for VOUT = 3.3 V, IOUT = 1.5 A
GUID-20220607-SS0I-4JPD-6CVL-SX8VTRG1BFFR-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF,
3.6 V ≤ VIN ≤ 6 V, VEN = 1.1 V
Figure 6-26 BIAS Line Regulation for VOUT = 3.3 V, IOUT = 10 mA
GUID-20220607-SS0I-SSZJ-GPLT-KGWZWZJ8C0PC-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 0.95 V, 2.3 V ≤ VBIAS ≤ 5 V, VEN = 1.1 V
Figure 6-28 Load Regulation for IOUT = 0 A to Load,
VOUT = 0.65 V
GUID-20220607-SS0I-6KPX-7NN1-BCZZX41MVW4C-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 0.95 V, 2.3 V ≤ VBIAS ≤ 5 V, VEN = 1.1 V
Figure 6-30 Load Regulation for IOUT = 10 mA to Load,
VOUT = 0.65 V
GUID-20220613-SS0I-J2ZM-C7WT-NRBCWXFBTK8B-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V, VEN = 1.1 V
Figure 6-32 Dropout Voltage vs Input Voltage
GUID-20220613-SS0I-KP73-2B9V-0ZNXZ3JTBD8G-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = VIN, VEN = 1.1 V
Figure 6-34 Dropout Voltage vs Bias Voltage for IOUT = 50 mA
GUID-20220613-SS0I-FK35-DZCB-0JRDTV60XPQD-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = VIN, VEN = 1.1 V
Figure 6-36 Dropout Voltage vs Bias Voltage for IOUT = 1.5 A
GUID-20220613-SS0I-ZZP6-FQXH-GTTCHZHWDTZ2-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 0.95 V, VEN = 1.1 V
Figure 6-38 Current Limit vs Bias Voltage for VOUT = 0.65 V
GUID-20220613-SS0I-00HR-JGXV-LXM1RHNN3Q3D-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VEN = 0.4 V
 
Figure 6-40 Shutdown Current vs Bias Voltage for VIN = 0.95 V
GUID-20220613-SS0I-LJBB-GHHG-CQTTHDHH4GTT-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 6 V
Figure 6-42 Enable Voltage Threshold vs Temperature
GUID-20220613-SS0I-FC3T-WJWJ-DBFKHQPGJQTB-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V,
1.1 V ≤ VEN ≤ 6 V
Figure 6-44 UVLOIN Voltage Threshold vs Temperature
GUID-20220613-SS0I-HTCQ-BKRV-JTS2MLRBPGDM-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 5 V,
1.1 V ≤ VEN ≤ 6 V
Figure 6-46 UVLOBIAS Voltage Threshold vs Temperature
GUID-20220613-SS0I-71RQ-KBCF-2NDJWNDRSPLM-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VBIAS = 6 V, VEN ≤ 0.4 V
Figure 6-48 Pulldown Resistors vs Temperature
GUID-20220613-SS0I-J42Q-36TG-SBZNRBGXZ9QH-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, 0.95 V ≤ VIN ≤ 6 V, VOUT(NOM) = 0.65 V, VBIAS = 6 V, IOUT = 2 mA, VEN = 6 V
Figure 6-50 FB Pin Current vs Temperature
GUID-20220613-SS0I-HWKN-4SKP-5RQRJ1S1LT8Z-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VOUT = 3.3 V, VEN = 1.1 V
Figure 6-52 IN Pin Quiescent Current vs Bias Voltage for
IOUT = 1.5 A
GUID-20220613-SS0I-4KG6-QPML-C8SCVSKRGPKG-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VOUT = 3.3 V, VEN = 1.1 V
Figure 6-54 IN Pin Quiescent Current vs Bias Voltage for
IOUT = 10 mA
GUID-20220613-SS0I-KCVH-62WC-QXH66MXX3DSX-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VOUT = 3.3 V, VEN = 1.1 V
Figure 6-56 IN Pin Quiescent Current vs Bias Voltage for
IOUT = 0 A
GUID-20220613-SS0I-L6K1-PGFV-XXHSLN0M84QD-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, CSS = 0 nF, VIN = 3.6 V, VOUT = 3.3 V, VBIAS = 5 V, VEN = 1.1 V
Figure 6-58 IN Pin Quiescent Current vs Temperature