SBVS343A March   2019  – September 2019 TPS7A78

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Schematic Half-Bridge Configuration
      2.      Typical Schematic Full-Bridge Configuration
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Active Bridge Control
      2. 7.3.2 Full-Bridge (FB) and Half-Bridge (HB) Configurations
      3. 7.3.3 4:1 Switched-Capacitor Voltage Reduction
      4. 7.3.4 Undervoltage Lockout Circuits (VUVLO_SCIN) and (VUVLO_LDO_IN)
      5. 7.3.5 Dropout Voltage Regulation
      6. 7.3.6 Current Limit
      7. 7.3.7 Programmable Power-Fail Detection
      8. 7.3.8 Power-Good (PG) Detection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disabled Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitors Requirements
      3. 8.1.3 Startup Behavior
      4. 8.1.4 Load Transient
      5. 8.1.5 Standby Power and Output Efficiency
      6. 8.1.6 Reverse Current
      7. 8.1.7 Switched-Capacitor Stage Output Impedance
      8. 8.1.8 Power Dissipation (PD)
      9. 8.1.9 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Calculating the Cap-Drop Capacitor CS
          1. 8.2.2.1.1 CS Calculations for the Typical Design
        2. 8.2.2.2 Calculating the Surge Resistor RS
          1. 8.2.2.2.1 RS Calculations for the Typical Design
        3. 8.2.2.3 Checking for the Device Maximum ISHUNT Current
          1. 8.2.2.3.1 ISHUNT Calculations for the Typical Design
        4. 8.2.2.4 Calculating the Bulk Capacitor CSCIN
          1. 8.2.2.4.1 CSCIN Calculations for the Typical Design
        5. 8.2.2.5 Calculating the PFD Pin Resistor Dividers for a Power-Fail Detection
          1. 8.2.2.5.1 PFD Pin Resistor Divider Calculations for the Typical Design
        6. 8.2.2.6 Summary of the Typical Application Design Components
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
        2. 11.1.1.2 SIMPLIS Model
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.1 Calculating the Cap-Drop Capacitor CS

Use Equation 8 to calculate the minimum required cap-drop capacitance needed to support the application current. For common application conditions, Table 3 can be used to select the minimum standard cap-drop capacitor required to support the application current. However, neither Equation 8 nor Table 3 account for capacitance derating under biasing voltage and operating temperature conditions. Follow the manufacturer recommendation and guidelines on capacitor derating and degradation to ensure the minimum-required capacitance needed for the application under various operating conditions. Do not use a load current less than 10 mA to calculate the CS capacitor because the device current is a larger fraction of the load current. Equation 8 and Table 3 can also be used to calculate the value of CS depending on the application VAC (MIN) voltage and frequency and then use the highest value for the application.

Equation 8. CS = IOUT / (16 × ƒ × [√2 × VAC (MIN) – 4 × (VLDO_OUT (nom) + 0.6 V)])

where

  • the CS value is the minimum cap-drop capacitance value in farads needed to support IOUT
  • IOUT is the application nominal load current, but the application peak current must be considered if this current cannot be supported by the LDO output capacitor
  • VLDO_OUT is the targeted LDO output voltage
  • VAC (MIN) is the minimum RMS VAC supply voltage
  • ƒ is the minimum VAC line frequency

Table 3. The Minimum Required Cap-Drop Capacitor CS

VAC (MIN) (ƒ) IOUT (mA) CS FOR FB (nF) CS FOR HB (nF)
120 (60) 10 100 220
30 330 470
60 560 1000
90 820 1500
120 1000 2200
240 (50) 10 47 100
30 150 330
60 330 560
90 470 820
120 560 1200

The capacitance value of CS from Equation 8 is for the FB configuration. For the HB configuration, double the calculated capacitance value, then approximate the value up to the nearest standard capacitor value after taking capacitance degradation into account. Similarly, the capacitor value of CS from Table 3 represents the minimum required capacitor value and is already approximated to the nearest standard value but capacitor degradation is not accounted for.