SBVS343A March   2019  – September 2019 TPS7A78

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Schematic Half-Bridge Configuration
      2.      Typical Schematic Full-Bridge Configuration
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Active Bridge Control
      2. 7.3.2 Full-Bridge (FB) and Half-Bridge (HB) Configurations
      3. 7.3.3 4:1 Switched-Capacitor Voltage Reduction
      4. 7.3.4 Undervoltage Lockout Circuits (VUVLO_SCIN) and (VUVLO_LDO_IN)
      5. 7.3.5 Dropout Voltage Regulation
      6. 7.3.6 Current Limit
      7. 7.3.7 Programmable Power-Fail Detection
      8. 7.3.8 Power-Good (PG) Detection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Mode
      3. 7.4.3 Disabled Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitors Requirements
      3. 8.1.3 Startup Behavior
      4. 8.1.4 Load Transient
      5. 8.1.5 Standby Power and Output Efficiency
      6. 8.1.6 Reverse Current
      7. 8.1.7 Switched-Capacitor Stage Output Impedance
      8. 8.1.8 Power Dissipation (PD)
      9. 8.1.9 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Calculating the Cap-Drop Capacitor CS
          1. 8.2.2.1.1 CS Calculations for the Typical Design
        2. 8.2.2.2 Calculating the Surge Resistor RS
          1. 8.2.2.2.1 RS Calculations for the Typical Design
        3. 8.2.2.3 Checking for the Device Maximum ISHUNT Current
          1. 8.2.2.3.1 ISHUNT Calculations for the Typical Design
        4. 8.2.2.4 Calculating the Bulk Capacitor CSCIN
          1. 8.2.2.4.1 CSCIN Calculations for the Typical Design
        5. 8.2.2.5 Calculating the PFD Pin Resistor Dividers for a Power-Fail Detection
          1. 8.2.2.5.1 PFD Pin Resistor Divider Calculations for the Typical Design
        6. 8.2.2.6 Summary of the Typical Application Design Components
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Module
        2. 11.1.1.2 SIMPLIS Model
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4 Device Functional Modes

The unique features of the TPS7A78, along with its dual-input power-supply capability, enables the device to be used in a vast array applications. Table 1 gives a general overview of the conditions that lead to different modes of operation, given that the requirements in the Typical Application section are met.

Table 1. Device Functional Mode Comparison

OPERATING MODE PARAMETER
DEVICE POWER-SUPPLY IOUT TJ
Normal operation VAC supply(1) / DC supply(2) IOUT < ICL used in the Calculating the Cap-Drop Capacitor CS section TJ < TSD (Shutdown)
Dropout mode(3) CS or CSCIN capacitors are not sufficient to support IOUT (VAC supply) IOUT < ICL used in the Calculating the Cap-Drop Capacitor CS section TJ < TSD (Shutdown)
VSCIN ≤ VUVLO SCIN rising threshold and VLDO_IN > VUVLO LDO_IN rising threshold (DC supply)(4) IOUT < ICL used in the Calculating the Cap-Drop Capacitor CS section TJ < TSD (Shutdown)
Disabled mode(5) VLDO_IN < VUVLO LDO_IN falling threshold (VAC supply) Not applicable TJ > TSD (Shutdown)
VLDO_IN < VUVLO LDO_IN falling threshold (DC supply)
(1) The device can function with the VAC supply down to 18 VRMS; see the Typical Application section for details.
(2) The DC supply applied on the SCIN pin must be bounded by the VSCIN (MAX) > VSCIN > VUVLO_SCIN (RISING) threshold as specified in the Recommended Operating Conditions and Electrical Characteristics tables.
(3) The device can be in dropout when powered by VAC or DC supplies; see the Dropout Voltage Regulation section for details.
(4) This condition applies after device has started up.
(5) Any true condition disables the device VLDO_OUT and stops the switched-capacitor stage from switching; see the Disabled Mode section for details.