SBVS324A June   2017  – June 2020 TPS7A90

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Circuit
      2.      Typical Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Enable
      2. 7.3.2 Dropout Voltage (VDO)
      3. 7.3.3 Output Voltage Accuracy
      4. 7.3.4 High Power-Supply Rejection Ratio (PSRR)
      5. 7.3.5 Low Output Noise
      6. 7.3.6 Output Soft-Start Control
      7. 7.3.7 Power-Good Function
      8. 7.3.8 Internal Protection Circuitry
        1. 7.3.8.1 Undervoltage Lockout (UVLO)
        2. 7.3.8.2 Internal Current Limit (ICL)
        3. 7.3.8.3 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjustable Output
      2. 8.1.2 Start-Up
        1. 8.1.2.1 Enable (EN) and Undervoltage Lockout (UVLO)
        2. 8.1.2.2 Noise-Reduction and Soft-Start Capacitor (CNR/SS)
          1. 8.1.2.2.1 Noise Reduction
          2. 8.1.2.2.2 Soft-Start and In-Rush Current
      3. 8.1.3 Capacitor Recommendation
        1. 8.1.3.1 Input and Output Capacitor Requirements (CIN and COUT)
          1. 8.1.3.1.1 Load-Step Transient Response
        2. 8.1.3.2 Feed-Forward Capacitor (CFF)
      4. 8.1.4 Power Dissipation (PD)
      5. 8.1.5 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Board Layout
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 SPICE Models
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) TPS7A90 UNIT
DSK (SON)
10 PINS
RθJA Junction-to-ambient thermal resistance 56.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 46.3 °C/W
RθJB Junction-to-board thermal resistance 29.1 °C/W
ψJT Junction-to-top characterization parameter 0.8 °C/W
ψJB Junction-to-board characterization parameter 29.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 3.2 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.