SBVS415A april   2023  – july 2023 TPS7A96

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Setting and Regulation
      2. 7.3.2 Ultra-Low Noise and Ultra-High Power-Supply Rejection Ratio (PSRR)
      3. 7.3.3 Programmable Current Limit and Power-Good Threshold
      4. 7.3.4 Programmable Soft-Start (NR/SS Pin)
      5. 7.3.5 Precision Enable and UVLOs
      6. 7.3.6 Active Discharge
      7. 7.3.7 Thermal Shutdown Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
      4. 7.4.4 Current-Limit Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1  Output Voltage Restart (Overshoot Prevention Circuit)
      2. 8.1.2  Precision Enable (External UVLO)
      3. 8.1.3  Undervoltage Lockout (UVLO) Operation
      4. 8.1.4  Dropout Voltage (VDO)
      5. 8.1.5  Power-Good Feedback (FB_PG Pin) and Power-Good Threshold (PG Pin)
      6. 8.1.6  Adjusting the Factory-Programmed Current Limit
      7. 8.1.7  Programmable Soft-Start and Noise-Reduction (NR/SS Pin)
      8. 8.1.8  Inrush Current
      9. 8.1.9  Optimizing Noise and PSRR
      10. 8.1.10 Adjustable Operation
      11. 8.1.11 Paralleling for Higher Output Current and Lower Noise
      12. 8.1.12 Recommended Capacitor Types
      13. 8.1.13 Load Transient Response
      14. 8.1.14 Power Dissipation (PD)
      15. 8.1.15 Estimating Junction Temperature
      16. 8.1.16 TPS7A96EVM-106 Thermal Analysis
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Modules
        2. 9.1.1.2 Spice Models
      2. 9.1.2 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.1.10 Adjustable Operation

As shown in Figure 8-15, the output voltage of the device can be set using a single external resistor (RNR/SS). Equation 7 calculates the output voltage.

Equation 7. VOUT = INR/SS(NOM) × RNR/SS
GUID-20220802-SS0I-2NMN-XSRL-GB1Q2LBPLVRJ-low.gif Figure 8-15 Typical Circuit

Table 8-4 lists the recommended RNR/SS resistor values to achieve several common rails using a standard 1%-tolerance resistor.

Table 8-4 Recommended RNR/SS Values
TARGETED OUTPUT VOLTAGE
(V)		 RNR/SS (kΩ) CALCULATED OUTPUT VOLTAGE
(V)
0.4 2.67 0.4005
0.5 3.32 0.498
0.6 4.02 0.603
0.7 4.64 0.696
0.8 5.36 0.804
0.9 6.04 0.906
1.0 6.65 0.9975
1.2 8.06 1.209
1.5 10.0 1.5
2.5 16.5 2.475
3.0 20.0 3.0
3.3 22.1 3.315
3.6 24.3 3.645
4.7 31.6 4.74
5.0 33.2 4.98
Note:

To avoid engaging the current limit during start-up with a large COUT capacitor, make sure that:

  • A minimum NR/SS capacitor of 1 μF is used
  • When the output capacitor is greater than 100 μF, maintain a COUT to CNR/SS ratio < 100

Because the set resistor is also placed on the NR/SS pin, consider using a thin-film resistor and provide enough resistor temperature drift to provide the targeted accuracy.