SBVS397A September 2023 – November 2023 TPS7B4256-Q1
PRODUCTION DATA
By pulling the reference voltage below VIL, the device disables and enters a sleep state where the device draws 3.5 μA (max) from the power supply. In a typical application, the reference voltage is generally sourced from another LDO voltage rail. A scenario where the device must be disabled without a shutdown of the reference voltage can occur. The device can be configured as shown in Figure 6-8 in this case. The TPS7B84-Q1 is a 150-mA LDO with ultra-low quiescent current that provides the reference voltage to both the TPS7B4256-Q1 and the ADC. The operational status of the device is controlled by a microcontroller (MCU) input or output (I/O).