• Menu
  • Product
  • Email
  • PDF
  • Order now

  • TPS7B85-Q1 150-mA, 40-V, Low-Dropout Regulator With Power-Good and Integrated Voltage Monitoring

    • SBVS360A February   2020  – November 2020 TPS7B85-Q1

      PRODUCTION DATA  

  • CONTENTS
  • SEARCH
  • TPS7B85-Q1 150-mA, 40-V, Low-Dropout Regulator With Power-Good and Integrated Voltage Monitoring
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable (EN)
      2. 7.3.2 Power-Good (PG)
        1. 7.3.2.1 Adjustable Power-Good (PGADJ)
      3. 7.3.3 Adjustable Power-Good Delay Timer (DELAY)
      4. 7.3.4 Sense Comparator
      5. 7.3.5 Undervoltage Lockout
      6. 7.3.6 Thermal Shutdown
      7. 7.3.7 Current Limit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Input and Output Capacitor Selection
      2. 8.1.2 Dropout Voltage
      3. 8.1.3 Reverse Current
      4. 8.1.4 Power Dissipation (PD)
        1. 8.1.4.1 Thermal Performance Versus Copper Area
      5. 8.1.5 Estimating Junction Temperature
      6. 8.1.6 SI Pin
        1. 8.1.6.1 Calculating the Sense Input (SI) Pin Threshold
        2. 8.1.6.2 Different Uses for the Sense Input Pin
          1. 8.1.6.2.1 Monitoring Input Voltage
          2. 8.1.6.2.2 Creating OV and UV Power-Good
          3. 8.1.6.2.3 Monitoring a Separate Supply Voltage
      7. 8.1.7 Pulling Up the SO and PG Pins to a Different Voltage
      8. 8.1.8 Power-Good
        1. 8.1.8.1 Setting the Adjustable Power-Good Threshold
        2. 8.1.8.2 Setting the Adjustable Power-Good Delay
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor
        2. 8.2.2.2 Output Capacitor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Package Mounting
      2. 10.1.2 Board Layout Recommendations to Improve PSRR and Noise Performance
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • DRC|10
    • MPDS117L
Thermal pad, mechanical data (Package|Pins)
  • DRC|10
    • QFND652
Orderable Information
  • sbvs360a_oa
  • sbvs360a_pm
search No matches found.
  • Full reading width
    • Full reading width
    • Comfortable reading width
    • Expanded reading width
  • Card for each section
  • Card with all content

 

DATA SHEET

TPS7B85-Q1 150-mA, 40-V, Low-Dropout Regulator With Power-Good and Integrated Voltage Monitoring

1 Features

  • AEC-Q100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
    • Junction temperature: –40°C to +150°C, TJ
  • Input voltage range: 3 V to 40 V (42 V max)
  • Output voltage range: 3.3 V and 5 V (fixed)
  • Output current: up to 150 mA
  • Output voltage accuracy: ±0.75% (max)
  • Low dropout voltage:
    • 225 mV (max) at 150 mA (VOUT ≥ 3.3 V)
  • Low quiescent current:
    • 18 µA (typ)
    • 4 µA (max) when disabled
  • Excellent line transient response:
    • ±2% VOUT deviation during cold-crank
    • ±2% VOUT deviation (1-V/µs VIN slew rate)
  • Integrated voltage detection
  • Power-good with adjustable threshold and programmable delay period
  • Stable with a 2.2-µF or larger capacitor
  • Functional Safety-Capable
    • Documentation available to aid functional safety system design
  • Package: 10-pin VSON with thermal pad
    • Low thermal resistance (RθJA): 50.3°C/W

2 Applications

  • Reconfigurable instrument clusters
  • Body control modules (BCM)
  • Always-on battery-connected applications:
    • Automotive gateways
    • Remote keyless entries (RKE)
GUID-07A57807-C8BC-4CF4-8BB4-DCB689CDEAE1-low.gif Line Transient Response (3-V/µs VIN Slew Rate)

3 Description

The TPS7B85-Q1 is a low-dropout linear regulator designed to connect to the battery in automotive applications. The device has an input voltage range extending to 40 V, which allows the device to withstand transients (such as load dump) that are anticipated in automotive systems. With only an 18-µA quiescent current, the device is an optimal solution for powering always-on components such as microcontrollers (MCUs) and controller area network (CAN) transceivers in standby systems.

The device has state-of-the-art transient response that allows the output to quickly react to changes in load or line (for example, during cold-crank conditions). Additionally, the device has a novel architecture that minimizes output overshoot when recovering from dropout. During normal operation, the device has a tight DC accuracy of ±0.75% over line, load, and temperature.

The TPS7B85-Q1 is equipped with power-good and integrated voltage monitoring. The power-good delay and voltage threshold can be adjusted by external components. The integrated voltage detector can be used to monitor the input voltage and alert downstream components (such as MCUs) when the battery voltage begins to fall.

The device is available in a small VSON package that facilitates a compact printed circuit board (PCB) design. The low thermal resistance enables sustained operation despite significant dissipation across the device.

Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TPS7B85-Q1 VSON (10) 3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-FA99B836-47D9-4BB9-B95A-44DC5F97385F-low.gif Typical Application Schematic

4 Revision History

Changes from Revision * (February 2020) to Revision A (November 2020)

  • Changed document status from advanced information to production dataGo

5 Pin Configuration and Functions

GUID-0CCE979F-ED00-4B04-9929-A9C674DEC542-low.gif Figure 5-1 DRC Package,10-Pin VSON,Top View
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME DRC
DELAY 4 O Power-good delay adjustment pin. Connect a capacitor from this pin to GND to set the PG reset delay. Leave this pin floating for a default (t(DLY_FIX)) delay. See the Section 8.1.8 section for more information. If this functionality is not desired, leave this pin floating because connecting this pin to GND causes a perminant increase in the GND current.
EN 8 I Enable pin. The device is disabled when the enable pin becomes lower than the enable logic input low level (VIL). To ensure the device is enabled, the EN pin must be driven above the logic high level (VIH). This pin should not be left floating as this pin is high impedance if it is left floating the part may enable or disable.
GND 6 G Ground pin. Connect this pin to the thermal pad with a low-impedance connection.
NC 5 — No internal connection. Connect this pin to GND for the best thermal resistance.
PGADJ 2 I Power-good threshold-adjustment pin. Connect a resistor divider between the PGADJ and OUT pins to set the power-good threshold. Connect this pin to ground to set the threshold to VPG(TH,FALLING). See Section 8.1.8 for more information.
PG 7 O Power-good pin. This pin has an internal pullup resistor. Do not connect this pin to VOUT or any other biased voltage rail. VPG is logic level high when VOUT is above the power-good threshold. See Section 8.1.8 for more information.
SI 9 I Sense input pin. Connect via an external voltage divider to the supply voltage to be monitored.
SO 3 O Sense output pin. This pin has an internal pullup resistor. Do not connect this pin to VOUT or any other biased voltage rail. VSO is logic level low when VSI falls below the sense-low threshold.
IN 10 P Input power-supply voltage pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground as listed in the Recommended Operating Conditions table and the Section 8.2.2.1 section. Place the input capacitor as close to the input of the device as possible.
OUT 1 O Regulated output voltage pin. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to ground; see the Recommended Operating Conditions table and the Section 8.2.2.2 section. Place the output capacitor as close to the output of the device as possible. If using a high ESR capacitor, decouple the output with a 100-nF ceramic capacitor.
Thermal pad — Thermal pad. Connect the pad to GND for the best possible thermal performance. See the Section 10 section for more information.
(1) I = input; O = output; P = power; G = ground.

 
Texas Instruments

© Copyright 1995-2025 Texas Instruments Incorporated. All rights reserved.
Submit documentation feedback | IMPORTANT NOTICE | Trademarks | Privacy policy | Cookie policy | Terms of use | Terms of sale