SBVS363A
December 2020 – April 2021
TPS7B87-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Power-Good (PG)
7.3.2
Adjustable Power-Good Delay Timer (DELAY)
7.3.3
Undervoltage Lockout
7.3.4
Thermal Shutdown
7.3.5
Current Limit
7.4
Device Functional Modes
7.4.1
Device Functional Mode Comparison
7.4.2
Normal Operation
7.4.3
Dropout Operation
7.4.4
Disabled
8
Application and Implementation
8.1
Application Information
8.1.1
Input and Output Capacitor Selection
8.1.2
Dropout Voltage
8.1.3
Reverse Current
8.1.4
Power Dissipation (PD)
8.1.4.1
Thermal Performance Versus Copper Area
8.1.4.2
Power Dissipation Versus Ambient Temperature
8.1.5
Estimating Junction Temperature
8.1.6
Pulling Up the PG Pin to a Different Voltage
8.1.7
Power-Good
8.1.7.1
Setting the Adjustable Power-Good Delay
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Input Capacitor
8.2.2.2
Output Capacitor
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Package Mounting
10.1.2
Board Layout Recommendations to Improve PSRR and Noise Performance
10.2
Layout Examples
11
Device and Documentation Support
11.1
Device Support
11.1.1
Device Nomenclature
11.1.2
Development Support
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDA|8
MPDS092F
KVU|5
MPSF019
Thermal pad, mechanical data (Package|Pins)
DDA|8
PPTD178C
KVU|5
QFND405
Orderable Information
sbvs363a_oa
sbvs363a_pm
7.4
Device Functional Modes