SLVSH48A May   2024  – September 2024 TPS7H1121-SP

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Quality Conformance Inspections
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Adjustable Output Voltage (Feedback Circuit)
      2. 8.3.2  Enable
      3. 8.3.3  Dropout Voltage VDO
      4. 8.3.4  Output Voltage Accuracy
      5. 8.3.5  Output Noise
      6. 8.3.6  Power Supply Rejection Ratio (PSRR)
      7. 8.3.7  Soft Start
      8. 8.3.8  Power Good (PG)
      9. 8.3.9  Stability
        1. 8.3.9.1 Stability
        2. 8.3.9.2 STAB Pin
      10. 8.3.10 Programmable Current Limit
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable / Disable
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Voltage Configuration
        2. 9.2.2.2 Output Voltage Accuracy
        3. 9.2.2.3 Enable Threshold
        4. 9.2.2.4 Soft Start Capacitor
        5. 9.2.2.5 Programmable Current Limit Resistor
        6. 9.2.2.6 Characterization of Overcurrent Events that Exceed Thermal Limits
        7. 9.2.2.7 Power Good Pull Up Resistor
        8. 9.2.2.8 Capacitors
          1. 9.2.2.8.1 Hybrid Output Capacitor Network
        9. 9.2.2.9 Frequency Compensation
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • HFT|22
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Stability

Traditional stability margins (such as gain margin ≥ 6dB and phase margin ≥ 50º) for space rated IC's are often more onerous than industrial and consumer electronics. The TPS7H1121 is designed to support a wide range of space rated output capacitors (generally 22μF to 220μF) while maintaining a 6dB gain margin and 50º phase margin without utilizing the included STAB pin for external compensation.

In addition to the TPS7H1121's wide intrinsic stability, the STAB pin may be utilized to insert an external RC compensation network that ties directly to the error amplifier's output. This architecture, as depicted in Figure 8-2, illustrates how an external compensation network is directly inserted prior to the pass element's buffer, which maximizes the efficacy of the inserted RC compensation circuit.

This level of efficacy for an external compensation network enables end-users of the TPS7H1121 to conduct in depth stability analysis and widen stability margins for the applied output load. Additionally, it enables utilization of output capacitors as low as 6.8μF while allowing flexibility in managing low-ESR capacitors.

TPS7H1121-SP Simplified Compensation Schematic Figure 8-2 Simplified Compensation Schematic