SLVSAS4J June   2013  – April 2017 TPS7H1201-HT

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Power Good (PG)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable/Disable
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Stability
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Adjustable Output Voltage (Feedback Circuit)
        2. 8.2.2.2 PCL
        3. 8.2.2.3 High-Side Current Sense
        4. 8.2.2.4 Current Foldback
        5. 8.2.2.5 Transient Response
        6. 8.2.2.6 Current Sharing
        7. 8.2.2.7 Compensation
        8. 8.2.2.8 Output Noise
        9. 8.2.2.9 Capacitors
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage VIN, PG –0.3 7.5 V
FB, COMP, PCL, CS, EN –0.3 VIN + 0.3 V
Output voltage VOUT, SS –0.3 7.5 V
PG terminal sink current 0.001 5 mA
Maximum operating junction temperature, TJ –55 220 °C
Storage temperature, Tstg –55 220 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
TJ Operating junction temperature –55 210 °C
tR EN Rise time (10% to 90%) for EN signal 100 µs
tR VIN Rise time (10% to 90%) for VIN = EN 1 ms

6.4 Thermal Information

THERMAL METRIC(1)(3) TPS7H1201-HT UNIT
HKS (CFP)(2)
16 PINS
RθJA Junction-to-ambient thermal resistance 75.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 0.4 °C/W
RθJB Junction-to-board thermal resistance 64.8 °C/W
ψJB Junction-to-board characterization parameter 53.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
(1) Maximum power dissipation may be limited by overcurrent protection.
(2) Power rating at a specific ambient temperature TA should be determined with a junction temperature below 220°C. This is the point where distortion starts to substantially increase. Thermal management of the PCB should strive to keep the junction temperature at or below 220°C for best performance and long-term reliability.
(3) Test board conditions:
  1. 2.5 inches × 2.5 inches, 4 layers, thickness: 0.062 inch
  2. 2-oz. copper traces located on the top of the PCB
  3. 2-oz. copper ground planes on the 2 internal layers and bottom layer
  4. 48 (0.010-inch) thermal vias located under the device package

6.5 Electrical Characteristics

1.5 V ≤ VIN ≤ 7 V, VOUT(target) = VIN – 0.3 V, IOUT = 10 mA, VEN = 1.1 V, COUT = 22 µF, PG terminal pulled up to VIN with 50 kΩ, over operating temperature range (TJ = –55°C to 210°C), unless otherwise noted. Typical values are at TJ = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage range 1.5 7 V
VFB Feedback terminal voltage 1.5 V ≤ VIN ≤ 7 V TJ = 125°C 0.593 0.605 0.617 V
TJ = 210°C 0.580 0.605 0.630
VOUT Output voltage range 0.8 VIN – 0.2 V
Output voltage accuracy IOUT ≤ 0.5 A, 1.5 V ≤ VIN ≤ 7 V,
VOUT = 6.8 V(1)		 TJ = 125°C –2% 2%
TJ = 210°C –4.2% 4.2%
ΔVOUT%/ ΔVIN Line regulation 1.5 V ≤ VIN ≤ 7 V –0.07 0.01 0.07 %/V
ΔVOUT%/ ΔIOUT Load regulation 0.8 V ≤ VOUT ≤ 6.8 V, 0 ≤ ILoad ≤ 0.5 A 0.0125 %/A
ΔVO DC input line regulation 1.5 V ≤ VIN ≤ 7 V, VOUT = 0.8 V, IOUT = 10 mA,
TJ = –55°C(2) 		0.5 3 mV
1.5 V ≤ VIN ≤ 7 V, VOUT = 0.8 V, IOUT = 10 mA,
TJ = 25°C(2) 		0.2 0.6
1.5 V ≤ VIN ≤ 7 V, VOUT = 0.8 V, IOUT = 10 mA,
TJ = 125°C(2) 		0.2 1
1.5 V ≤ VIN ≤ 7 V, VOUT = 0.8 V, IOUT = 10 mA,
TJ = 210°C(2) 		0.84 3
1.5 V ≤ VIN ≤ 7 V, VOUT = 1.2 V, IOUT = 10 mA,
TJ = –55°C(2) 		0.5 3
1.5 V ≤ VIN ≤ 7 V, VOUT = 1.2 V, IOUT = 10 mA,
TJ = 25°C(2) 		0.2 0.6
1.5 V ≤ VIN ≤ 7 V, VOUT = 1.2 V, IOUT = 10 mA,
TJ = 125°C(2) 		0.2 1
1.5 V ≤ VIN ≤ 7 V, VOUT = 1.2 V, IOUT = 10 mA,
TJ = 210°C(2) 		0.84 3
ΔVO DC output load regulation VOUT = 0.8 V, 0 ≤ ILoad ≤ 0.5 A, TJ = –55°C(2) 0.05 mV
VOUT = 0.8 V, 0 ≤ILoad ≤ 0.5 A, TJ = 25°C(2) 0.05
VOUT = 0.8 V, 0 ≤ ILoad ≤ 0.5 A, TJ = 125°C(2) 0.07
VOUT = 0.8 V, 0 ≤ ILoad ≤ 0.5 A, TJ = 210°C(2) 0.51
VOUT = 6.8 V, 0 ≤ ILoad ≤ 0.5 A, TJ = –55°C(2) 0.10
VOUT = 6.8 V, 0 ≤ ILoad ≤ 0.5 A, TJ = 25°C(2) 0.04
VOUT = 6.8 V, 0 ≤ ILoad ≤ 0.5 A, TJ = 125°C(2) 0.05
VOUT = 6.8 V, 0 ≤ ILoad ≤ 0.5 A, TJ = 210°C(2) 0.47
VDO Dropout voltage IOUT = 0.5 A, VOUT = 6.8 V, VIN = VOUT + 0.1 V 55.5 100 mV
ICL Programmable output current limit range VIN = 1.5 V, VOUT = 1.2 V, PCL resistance = 47 kΩ 500 700 mA
VIN = 1.5 V, VOUT = 1.2 V , PCL resistance varies 200 700
VCS Operating voltage range at CS 0.3 VIN V
CSR Current sense ratio ILOAD / ICS, VIN = 2.3 V, VOUT = 1.9 V 47394
IGND GND terminal current VIN = 1.5 V, VOUT = 1.2 V, IOUT = 0.5 A 13 20 mA
IQ Quiescent current (no load) VIN = VOUT + 0.5 V, IOUT = 0 A 12 17 mA
ISHDN Shutdown current VEN < 0.5 V, 0.8 V ≤ VIN ≤ 7 V 15 4500 µA
ISNS, IFB FB/SNS terminal current VIN = 7 V, VOUT = 6.8 V 1 10 nA
IEN EN terminal input current VIN = 7 V, VEN = 7 V 6.75 610 nA
VILEN EN terminal input low (disable) 3.5 V < VIN < 7 V 0.30 × VIN V
VIHEN EN terminal input high (enable) 3.5 V < VIN < 7 V 0.75 × VIN V
Eprop Dly Enable terminal propagation delay VIN = 2.2 V, EN rise to IOUT rise 650 1000 µs
TEN Enable terminal turn-on delay VIN = 2.2 V, VOUT = 1.8 V, ILOAD = 0.5 A,
COUT = 220 μF, CSS = 2 nF		 1.4 1.6 ms
VTHPG PG threshold on No load,VOUT = 1.2 V and VOUT = 6.8 V 84% 90%
VTHPGHYS PG hysteresis 1.5 V ≤ VIN ≤ 7 V 2%
VOLPG PG terminal output low IPG = 0 mA to –1 mA 73 300 mV
ILKGPG PG terminal leakage current VOUT > VTHPG, VPG = 7 V 0.02 20 µA
ISS SS terminal current VIN = 1.5 V to 7 V 2.5 6.3 µA
ISSdisb SS terminal disable current VIN = 1.5 V to 7 V 5 13 µA
VSS SS terminal voltage (device enabled) VIN = 1.5 V to 7 V 1.2 V
PSRR Power-supply rejection ratio VIN = 2.5 V, VOUT = 1.8 V,
COUT = 220 μF		 1 kHz 45 dB
100 kHz 20
VN Output noise voltage BW = 10 Hz to 100 kHz, IOUT = 500 mA, VIN = 2 V,
VOUT = 1.8 V		 20.26 µVRMS
TJ Operating junction temperature –55 210 °C
(1) Based upon using 0.1% resistors.
(2) Line and load regulations done under pulse condition for T < 10 ms.

6.6 Typical Characteristics

TPS7H1201-HT C004_SLVSAS4.gif
Figure 1. Feedback Voltage vs Temperature
TPS7H1201-HT C006_SLVSAS4.png
Figure 3. Ground Current vs Temperature
TPS7H1201-HT C008_SLVSAS4.png
Figure 5. Shutdown Current vs Temperature
TPS7H1201-HT C012_SLVSAS4.gif
Figure 7. Power Supply Ripple Rejection vs Frequency,
IOUT = 250 mA
TPS7H1201-HT C010_SLVSAS4.gif
Figure 9. Load Regulation vs Temperature
TPS7H1201-HT C005_SLVSAS4.png
Figure 2. Quiescent Current vs Temperature
TPS7H1201-HT C007_SLVSAS4.gif
Figure 4. Dropout Voltage vs Temperature
TPS7H1201-HT C009_SLVSAS4.gif
Figure 6. PG Threshold vs Temperature
TPS7H1201-HT C011_SLVSAS4.gif
Figure 8. Power Supply Ripple Rejection vs Frequency,
IOUT = No Load