SLVSH46A July   2023  – October 2023 TPS7H2140-SEP

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Current and Voltage Conventions
      2. 8.3.2 Accurate Current Sense
      3. 8.3.3 Adjustable Current Limit
      4. 8.3.4 Inductive-Load Switching-Off Clamp
      5. 8.3.5 Fault Detection and Reporting
        1. 8.3.5.1 Diagnostic Enable Function
        2. 8.3.5.2 Multiplexing of Current Sense
        3. 8.3.5.3 Fault Table
        4. 8.3.5.4 FAULT Reporting
      6. 8.3.6 Full Diagnostics
        1. 8.3.6.1 Short-to-GND and Overload Detection
        2. 8.3.6.2 Open-Load Detection
          1. 8.3.6.2.1 Channel On
          2. 8.3.6.2.2 Channel Off
        3. 8.3.6.3 Short-to-Input Detection
        4. 8.3.6.4 Reverse Polarity Detection
        5. 8.3.6.5 Thermal Fault Detection
          1. 8.3.6.5.1 Thermal Shutdown
      7. 8.3.7 Full Protections
        1. 8.3.7.1 UVLO Protection
        2. 8.3.7.2 Loss-of-GND Protection
        3. 8.3.7.3 Protection for Loss of Power Supply
        4. 8.3.7.4 Reverse-Current Protection
        5. 8.3.7.5 MCU I/O Protection
      8. 8.3.8 Parallel Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Working Modes
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Examples
        1. 9.4.2.1 Without a GND Network
        2. 9.4.2.2 With a GND Network
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Reverse-Current Protection

Reverse current occurs in two conditions: short to power and reverse polarity.

  • When a short to the input occurs, there is only reverse current through the body diode. IR1 specifies the limit of the reverse current.
  • In a reverse-polarity condition, there are reverse currents through the body diode and the device GND pin. IR2 specifies the limit of the reverse current. The GND pin maximum current is specified in the Absolute Maximum Ratings.

To protect the device, TI recommends two types of external circuitry.

  • Adding a blocking diode. Both the IC and load are protected when in reverse polarity.
    GUID-20230307-SS0I-PPDT-4CTQ-KQHDFTCXJ5DM-low.svg Figure 8-13 Reverse-Current External Protection, Method 1
  • Adding a GND network. The reverse current through the device GND is blocked. The reverse current through the FET is limited by the load itself. TI recommends a resistor in parallel with the diode as a GND network. The recommended selection are 1-kΩ resistor in parallel with a >100-mA diode. If multiple high-side switches are used, the resistor and diode can be shared among devices. The reverse current protection diode in the GND network forward voltage should be less than 0.6 V in any circumstances. In addition a minimum resistance of 4.7 kΩ is recommended on the I/O pins.
GUID-20230307-SS0I-03BS-DPLT-D075GWLJH1VR-low.svg Figure 8-14 Reverse-Current External Protection, Method 2