SLVSGP1A August   2022  – October 2022 TPS7H2221-SEP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Derating Curves
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuit and Timing Waveforms Diagrams
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 On and Off Control
      2. 8.3.2 Output Short Circuit Protection (ISC)
      3. 8.3.3 Fall Time (tFALL) and Quick Output Discharge (QOD)
        1. 8.3.3.1 QOD When System Power is Removed
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Limiting Inrush Current
        2. 9.2.2.2 Setting Fall Time for Shutdown Power Sequencing
        3. 9.2.2.3 Application Curves
    3. 9.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
    6. 10.6 Export Control Notice
    7. 10.7 Third-Party Products Disclaimer
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.3 Fall Time (tFALL) and Quick Output Discharge (QOD)

The TPS7H2221-SEP device includes a QOD pin that can be configured in one of three ways:

  • QOD pin shorted to VOUT pin. Using this method, after the switch becomes disabled the discharge rate is controlled with the value of the internal resistance QOD (RPD,QOD).
  • QOD pin connected to VOUT pin using an external resistor RQOD. After the switch becomes disabled, the discharge rate is controlled by the value of the total discharge resistance. To adjust the total discharge resistance, Equation 1 can be used:
    Equation 1. RDIS = RPD,QOD + RQOD

    where:

    • RDIS is the total output discharge resistance (Ω)
    • RPD,QOD (6 Ω typ.) is the internal pulldown resistance (Ω)
    • RQOD is the external resistance placed between the VOUT and QOD pins (Ω)
  • QOD pin is unused and left floating. Using this method, there will be no quick output discharge functionality and the output will remain floating after the switch is disabled.

The fall times of the device depend on many factors including the total discharge resistance (RDIS) and the output capacitance (COUT). To calculate the approximate fall time of VOUT use Equation 2.

Equation 2. tFALL = 2.2 × (RDIS || ROUT) × COUT

where:

  • tFALL is the output fall time from 90% to 10% (µs)
  • RDIS is the total QOD + RQOD resistance (Ω)
  • ROUT is the output load resistance (Ω)
  • COUT is the output load capacitance (µF)