SLVSEN7D april 2019 – may 2023 TPS7H4001-SP
PRODMIX
Refer to the PDF data sheet for device specific package drawings
The TPS7H4001-SP requires a high quality ceramic, type X5R or X7R, input decoupling capacitor of at least 4.7 µF of effective capacitance on the PVIN input voltage pins, and 4.7 µF on the VIN input voltage pin. In some applications additional bulk capacitance may also be required for the PVIN input. The effective capacitance includes any DC bias effects. The voltage rating of the input capacitor must be greater than the maximum input voltage. The capacitor must also have a ripple current rating greater than the maximum input current ripple of the TPS7H4001-SP. The input ripple current can be calculated using Equation 30.
The value of a ceramic capacitor varies significantly over temperature and the amount of DC bias applied to the capacitor. The capacitance variations due to temperature can be minimized by selecting a dielectric material that is stable over temperature. X5R and X7R ceramic dielectrics are usually selected for power regulator capacitors because they have a high capacitance to volume ratio and are fairly stable over temperature. The output capacitor must also be selected with the DC bias taken into account. The capacitance value of a capacitor decreases as the DC bias across a capacitor increases. For this example design, a ceramic capacitor with at least a 25-V voltage rating is required to support the maximum input voltage. For this example, six 22-μF and two 470-µF 25-V capacitors in parallel have been selected as the VIN and PVIN inputs are tied together so the TPS7H4001-SP may operate from a single supply. The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 31. Using the design example values, IOMAX = 18 A, CIN = 1.072 mF, fSW = 500 kHz, yields an input voltage ripple of 8.4 mV and a RMS input ripple current of 7.2 A.