SLVSFL2B May   2021  – December 2022 TPS7H4002-SP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VIN and Power VIN Pins (VIN and PVIN)
      2. 7.3.2  Voltage Reference
      3. 7.3.3  Adjusting the Output Voltage
      4. 7.3.4  Safe Start-Up Into Prebiased Outputs
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Slope Compensation
      7. 7.3.7  Enable and Adjust UVLO
      8. 7.3.8  Adjustable Switching Frequency and Synchronization (SYNC)
      9. 7.3.9  Slow Start (SS/TR)
      10. 7.3.10 Power Good (PWRGD)
      11. 7.3.11 Sequencing (SS/TR)
      12. 7.3.12 Output Overvoltage Protection (OVP)
      13. 7.3.13 Overcurrent Protection
        1. 7.3.13.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.13.2 Low-Side MOSFET Overcurrent Protection
      14. 7.3.14 Thermal Shutdown
      15. 7.3.15 Turn-On Behavior
      16. 7.3.16 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fixed-Frequency PWM Control
      2. 7.4.2 Continuous Current Mode (CCM) Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Operating Frequency
        2. 8.2.2.2 Output Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Output Schottky Diode
        5. 8.2.2.5 Slow Start Capacitor Selection
        6. 8.2.2.6 Undervoltage Lockout (UVLO) Set Point
        7. 8.2.2.7 Output Voltage Feedback Resistor Selection
        8. 8.2.2.8 Compensation Component Selection
      3. 8.2.3 Parallel Operation
      4. 8.2.4 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.12 Output Overvoltage Protection (OVP)

The device incorporates an output OVP circuit to minimize output voltage overshoot. For example, when the power supply output is overloaded, the error amplifier compares the actual output voltage to the internal reference voltage. If the VSENSE pin voltage is lower than the internal reference voltage for a considerable time, the output of the error amplifier demands maximum output current. After the condition is removed, the regulator output rises and the error amplifier output transitions to the steady-state voltage. In some applications with small output capacitance, the power supply output voltage can respond faster than the error amplifier. This leads to the possibility of an output overshoot. The OVP feature minimizes the overshoot by comparing the VSENSE pin voltage to the OVP threshold. If the VSENSE pin voltage is greater than the OVP threshold, the high-side MOSFET is turned off, preventing current from flowing to the output and minimizing output overshoot. When the VSENSE voltage drops lower than the OVP threshold, the high-side MOSFET is allowed to turn on at the next clock cycle.