SBVS445A October   2024  – December 2024 TPS7N53

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Voltage Setting and Regulation
      2. 6.3.2 Low-Noise, Ultra-High Power-Supply Rejection Ratio (PSRR)
      3. 6.3.3 Programmable Soft-Start (SS Pin)
      4. 6.3.4 Precision Enable and UVLO
      5. 6.3.5 Power-Good Pin (PG Pin)
      6. 6.3.6 Active Discharge
      7. 6.3.7 Thermal Shutdown Protection (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Disabled
      3. 6.4.3 Current-Limit Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1  Precision Enable (External UVLO)
      2. 7.1.2  Input and Output Capacitor Requirements (CIN and COUT)
      3. 7.1.3  Recommended Capacitor Types
      4. 7.1.4  Soft-Start (SS Pin) and Noise Reduction (NR Pin)
      5. 7.1.5  Charge Pump Noise
      6. 7.1.6  Optimizing Noise and PSRR
      7. 7.1.7  Adjustable Operation
      8. 7.1.8  Load Transient Response
      9. 7.1.9  Power-Good Functionality
      10. 7.1.10 Paralleling for Higher Output Current and Lower Noise
      11. 7.1.11 Power Dissipation (PD)
      12. 7.1.12 Estimating Junction Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Package Option Addendum

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.6 Typical Characteristics

VIN = 1.1V,VEN = 1.8V, CIN = 10 µF, CNR = 1μF, COUT = 10 μF, CSS = 10 nF, SNS pin shorted to OUT pin, and PG pin pulled up to VIN with 100 kΩ (unless otherwise noted); typical values are at TJ = 25°C

TPS7N53 PSRR vs Frequency and VIN
VOUT= 0.5V, CNR = 1μF, CIN = 4μF, IOUT = 3A
Figure 5-1 PSRR vs Frequency and VIN
TPS7N53 PSRR vs Frequency and COUT
VOUT = 0.5V, VIN=1.1V, CNR =1μF, CIN = 4μF, IOUT = 3A
Figure 5-3 PSRR vs Frequency and COUT
TPS7N53 Output Voltage Noise Density vs Frequency and IOUT
VOUT = 0.5V, VIN=1.1V, CNR =1μF
Figure 5-5 Output Voltage Noise Density vs Frequency and IOUT
TPS7N53 Charge Pump Output Voltage Noise Density vs Frequency and IOUT
VOUT = 0.75V, VIN=1.5V, CIN = 22μF, COUT =22μF||2.2μF||22nF
Figure 5-7 Charge Pump Output Voltage Noise Density vs Frequency and IOUT
TPS7N53 Load Transient for IOUT = 3A to 0A
VOUT = 0.5V, CNR = 1μF, VIN=1.1V, Slew Rate = 1A/μs
Figure 5-9 Load Transient for IOUT = 3A to 0A
TPS7N53 Load Transient for IOUT = 3A to 100mA
VOUT = 0.5V, CNR = 1μF, VIN=1.1V, Slew Rate = 1A/μs
Figure 5-11 Load Transient for IOUT = 3A to 100mA
TPS7N53 IN Line Transient for VIN = 1.8 V to 2.2V
VOUT = 1.5V, CNR = 1μF, Slew Rate = 1V/μs
Figure 5-13 IN Line Transient for VIN = 1.8 V to 2.2V
TPS7N53 Inrush Current for VOUT = 0.5V
CNR = 1μF, IOUT = 3A
Figure 5-15 Inrush Current for VOUT = 0.5V
TPS7N53 Dropout Voltage vs IOUT
VIN = 1.1V, VEN = 0.7V
Figure 5-17 Dropout Voltage vs IOUT
TPS7N53 Reference Current Accuracy vs IOUT
VOUT = 0.5V, VIN = 1.1V, VEN = 0.7V
Figure 5-19 Reference Current Accuracy vs IOUT
TPS7N53 Output Voltage Accuracy vs IOUT
VOUT = 0.5V, VIN = 1.1V, VEN = 0.7V
Figure 5-21 Output Voltage Accuracy vs IOUT
TPS7N53 Quiescent Current vs IOUT
VOUT = 0.5V, CNR = 1μF, VEN = 0.7V
Figure 5-23 Quiescent Current vs IOUT
TPS7N53 PSRR vs Frequency and IOUT
VOUT = 0.5V, VIN=1.1V, CNR =1μF, CIN = 4μF
Figure 5-2 PSRR vs Frequency and IOUT
TPS7N53 PSRR vs Frequency and CNR
VOUT = 0.5V, VIN=1.1V, CIN = 4μF, IOUT = 3A
Figure 5-4 PSRR vs Frequency and CNR
TPS7N53 Output Voltage Noise Density vs Frequency and CNR
VOUT = 0.5V, VIN=1.1V, IOUT =3A
Figure 5-6 Output Voltage Noise Density vs Frequency and CNR
TPS7N53 Load Transient for IOUT = 0A to 3A
VOUT = 0.5V, CNR = 1μF, VIN=1.1V, Slew Rate = 1A/μs
Figure 5-8 Load Transient for IOUT = 0A to 3A
TPS7N53 Load Transient for IOUT = 100 mA to 3A
VOUT = 0.5V, CNR = 1μF, VIN=1.1V, Slew Rate = 1A/μs
Figure 5-10 Load Transient for IOUT = 100 mA to 3A
TPS7N53 IN Line Transient for VIN = 1.1V to 2.2V
VOUT = 0.5V, CNR = 1μF, Slew Rate = 1V/μs
Figure 5-12 IN Line Transient for VIN = 1.1V to 2.2V
TPS7N53 Start-Up for CSS
VOUT = 0.5V, CNR = 1μF, IOUT = 3A
Figure 5-14 Start-Up for CSS
TPS7N53 Dropout Voltage vs VIN
VOUT = 0.5V, IOUT = 3A, VEN = 0.7V
Figure 5-16 Dropout Voltage vs VIN
TPS7N53 Reference Current vs Temperature
VOUT = 0.5V, VIN = 1.1V, VEN = 0.7V, IOUT = 0A
Figure 5-18 Reference Current vs Temperature
TPS7N53 Output Voltage Accuracy vs VIN
VOUT = 0.5V, IOUT = 3A, VEN = 0.7V
Figure 5-20 Output Voltage Accuracy vs VIN
TPS7N53 Quiescent Current vs VIN
VOUT = 0.5V, VIN = 1.1V, VEN = 0.7V
Figure 5-22 Quiescent Current vs VIN
TPS7N53 Shutdown Current vs VIN for VOUT = 0.5V
VOUT = 0.5V, CNR = 1μF, VEN = 0.4V
Figure 5-24 Shutdown Current vs VIN for VOUT = 0.5V