SLVSAD1B June   2010  – January 2016 TPS80010

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable
      2. 7.3.2 Buck DC-DC Converter and Load Switch
      3. 7.3.3 Boost DC-DC Converter and Post-Regulation LDO
      4. 7.3.4 Battery Monitoring Switch and False Load
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Buck Output Filter Design
        2. 8.2.2.2 Buck Inductor Selection
        3. 8.2.2.3 Buck Output Capacitor Selection
        4. 8.2.2.4 Buck Input Capacitor Selection
        5. 8.2.2.5 Boost Inductor Selection
        6. 8.2.2.6 Boost Input Capacitor
        7. 8.2.2.7 Boost Output Capacitor
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

The VIN_BOOST and VIN_BUCK pins must be bypassed to ground with a low-ESR ceramic bypass capacitor. Texas Instruments recommends the typical bypass capacitance is 10 μF.

  • The optimum placement is closest to the VIN_BUCK and VIN_BOOST pins of the device. Minimize the loop area formed by the bypass capacitor connection, the VINDCDC and VINLDO pins, and the thermal pad of the device.
  • The thermal pad must be tied to the PCB ground plane with multiple vias.
  • The FB _BOOST, FB_BUCK, SW_BOOST, SW_BCUK, and OUT_VM pins (feedback and output pins) traces must be routed away from any potential noise source to avoid coupling.
  • Output capacitance must be placed immediately at the output pins. Excessive distance from the capacitance to output pins may cause poor converter performance.

10.2 Layout Example

TPS80010 Layout_v3_SLVSAD1.gif Figure 16. TPS80010 Layout