SLVSDN4 June 2017 TPS82150
PRODUCTION DATA.
The device has a power good (PG) output. The PG pin goes high impedance once the output is above 95% of the nominal voltage, and is driven low once the output voltage falls below typically 90% of the nominal voltage. The PG pin is an open drain output and is specified to sink up to 2mA. The power good output requires a pull-up resistor connecting to any voltage rail less than 6V.
The PG pin goes low when the device is in shutdown or thermal shutdown. When the device is in UVLO, the PG pin is high impedance. The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters. Leave the PG pin floating when it is not used. Table 1 shows the PG pin logic.
Device State | PG Logic Status | ||
---|---|---|---|
High Impedance | Low | ||
Enable (EN=High) | VFB ≥ VTH_PG | √ | |
VFB ≤ VTH_PG | √ | ||
Shutdown (EN=Low) | √ | ||
UVLO | 0.7 V < VIN < VUVLO | √ | |
Thermal Shutdown | TJ > TSD | √ | |
Power Supply Removal | VIN < 0.7 V | √ |