SLVSDN4 June   2017 TPS82150

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Schematic spacespace
      2.      Efficiency vs Output Current, VIN=12V space
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommend Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM and PSM Operation
      2. 7.3.2 Low Dropout Operation (100% Duty Cycle)
      3. 7.3.3 Switch Current Limit
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Soft Startup (SS/TR)
      3. 7.4.3 Voltage Tracking (SS/TR)
      4. 7.4.4 Power Good Output (PG)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 1.8-V Output Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 8.2.1.2.2 Setting the Output Voltage
          3. 8.2.1.2.3 Input and Output Capacitor Selection
          4. 8.2.1.2.4 Soft Startup Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
    3. 8.3 System Examples
      1. 8.3.1 Inverting Power Supply
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Consideration
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Materials Information
      1. 12.1.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
  • SIL|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1) TPS82150 UNIT
8-Pin SIL
JEDEC 51-5 EVM
RθJA Junction-to-ambient thermal resistance 58.2 46.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 9.4 9.4 °C/W
RθJB Junction-to-board thermal resistance 14.4 14.4 °C/W
ψJT Junction-to-top characterization parameter 0.9 0.9 °C/W
ψJB Junction-to-board characterization parameter 14.2 14.0 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 21.3 21.3 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Theta-JA can be improved with a custom PCB design containing thermal vias where possible.