SLVSBR0C October   2014  – June 2015 TPS8268090 , TPS8268105 , TPS8268120 , TPS8268150 , TPS8268180

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Soft Start
      2. 8.3.2 Undervoltage Lockout
      3. 8.3.3 Short-Circuit Protection
      4. 8.3.4 Thermal Shutdown
      5. 8.3.5 Enable
      6. 8.3.6 MODE Pin
    4. 8.4 Device Functional Modes
      1. 8.4.1 Spread Spectrum, PWM Frequency Dithering
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input Capacitor Selection
        2. 9.2.2.2 Output Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Surface Mount Information
    4. 11.4 Thermal and Reliability Information
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 References
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Package Summary
    2. 13.2 MicroSiP™ DC/DC Module Package Dimensions

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • SIP|9
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

TPS8268x allows the design of a power supply with small solution size. In order to properly dissipate the heat, wide copper traces for the power connections should be used to distribute the heat across the PCB. If possible, a GND plane should be used as it provides a low impedance connection as well as serves as a heat sink.

In making the pad size for the SiP LGA balls, it is recommended that the layout use a non-solder-mask defined (NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the opening size is defined by the copper pad width. Figure 44 shows the appropriate diameters for a MicroSiPTM layout.

TPS8268180 TPS8268150 TPS8268120 TPS8268105 TPS8268090 land_pad_lvsai0.gifFigure 44. Recommended Land Pattern Image and Dimensions
SOLDER PAD DEFINITIONS(1)(2)(3)(4) COPPER PAD SOLDER MASK (5)
OPENING		 COPPER THICKNESS STENCIL (6)
OPENING 		STENCIL THICKNESS
Non-solder-mask defined (NSMD) 0.30mm 0.360mm 1oz max (0.032mm) 0.34mm diameter 0.1mm thick
(1) Circuit traces from non-solder-mask defined PCB lands should be 75μm to 100μm wide in the exposed area inside the solder mask opening. Wider trace widths reduce device stand off and slightly reduce reliability. However, wider traces may be used to improve the thermal relief of the device as well as to provide sufficient current handling.
(2) Best reliability results are achieved when the PCB laminate glass transition temperature is above the operating the range of the intended application.
(3) Recommend solder paste is Type 3 or Type 4.
(4) For a PCB using a Ni/Au surface finish, the gold thickness should be less than 0.5mm to avoid a reduction in thermal fatigue performance.
(5) Solder mask thickness should be less than 20 μm on top of the copper circuit pattern.
(6) For best solder stencil performance use laser cut stencils with electro polishing. Chemically etched stencils give inferior solder paste volume control.

11.2 Layout Example

TPS8268180 TPS8268150 TPS8268120 TPS8268105 TPS8268090 Layout.gifFigure 45. Recommended PCB Layout

11.3 Surface Mount Information

The TPS8268x MicroSiP™ DC/DC converter uses an open frame construction that is designed for a fully automated assembly process and that features a large surface area for pick and place operations. See the "Pick Area" in the package drawings.

Package height and weight have been kept to a minimum to allow the MicroSiP™ device to be handled similarly to a 0805 component.

See JEDEC/IPC standard J-STD-20b for reflow recommendations.

11.4 Thermal and Reliability Information

The TPS8268x´s output current may need to be de-rated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. The amount of current de-rating is dependent upon the input voltage, output power and environmental thermal conditions. Care should especially be taken in applications where the localized PCB temperature exceeds 65°C.

The TPS8268x die and inductor temperature should be kept lower than the maximum rating of 125°C, so care should be taken in the circuit layout to ensure good heat sinking. Sufficient cooling should be provided to ensure reliable operation.

Three basic approaches for enhancing thermal performance are listed below:

  • Improve the power dissipation capability of the PCB design.
  • Improve the thermal coupling of the component to the PCB.
  • Introduce airflow into the system.

To estimate the junction temperature, approximate the power dissipation within the TPS8268x by applying the typical efficiency stated in this datasheet to the desired output power; or, by taking an actual power measurement. Then, calculate the internal temperature rise of the TPS8268x above the surface of the printed circuit board by multiplying the TPS8268x´s power dissipation by its thermal resistance.

The thermal resistance numbers listed in the Thermal Information table are based on modeling the MicroSiP™ package mounted on a high-K test board specified per the JEDEC standard. For increased accuracy and fidelity to the actual application, it is recommended to run a thermal image analysis of the actual system.

Thermal measurements have been taken on the EVM to give a guideline on what temperature can be expected when the device is operated in free air at 25°C ambient under a certain load. The temperatures have been checked at 4 different spots as listed below:

  • Spot1: temperature of the input capacitor
  • Spot2: temperature of the output capacitor
  • Spot3: temperature of the inductor
  • Spot4: temperature on the main pcb next to the module
TPS8268180 TPS8268150 TPS8268120 TPS8268105 TPS8268090 TPS8268105_5V_1A.gifFigure 46. VIN= 5V, VOUT=1.05V, IOUT= 1A
388mW Power Dissipation
TPS8268180 TPS8268150 TPS8268120 TPS8268105 TPS8268090 TPS8268105_5V_1A2.gifFigure 47. VIN= 5V, VOUT= 1.05V, IOUT= 1.2A
466mW Power Dissipation

The TPS8268x contains a thermal shutdown that inhibits switching at high junction temperatures. The activation threshold of this function, however, is above 125°C to avoid interfering with normal operation. Thus, prolonged or repetitive operation under a condition in which the thermal shutdown activates necessarily means that the components internal to the MicroSiP™ package are subjected to high temperatures for prolonged or repetitive intervals, which may decrease the reliability of the device.

MLCC capacitor reliability/lifetime depends on temperature and applied voltage. At higher temperatures, MLCC capacitors are subject to stronger stress. On the basis of frequently evaluated failure rates determined with standardized test conditions, the reliability of all MLCC capacitors can be calculated for their actual operating temperature and voltage.

Failures caused by systematic degradation are described by the Arrhenius model. The most critical parameter (IR) is the Insulation Resistance (i.e. leakage current). The drop of IR below a lower limit (e.g. 1 MΩ) is used as the failure criterion. See Figure 48 and Figure 49. Note that the wear-out mechanisms occurring in the MLCC capacitors are not reversible but cumulative over time.

TPS8268180 TPS8268150 TPS8268120 TPS8268105 TPS8268090 C020_SLVSBR0.pngFigure 48. Input Capacitor Lifetime
Input Capacitor Lifetime
vs
Temperature and Voltage		 Output Capacitor Lifetime
vs
Temperature and Voltage
TPS8268180 TPS8268150 TPS8268120 TPS8268105 TPS8268090 C021_SLVSBR0.pngFigure 49. Output Capacitor Lifetime