The TPS92513/HV are 1.5A step-down (buck) current regulators with an integrated MOSFET to drive high current LEDs. Available with 42 V and 60 V (HV) input ranges, these LED drivers operate at a user selected fixed-frequency with peak-current mode control and deliver excellent line and load regulation.
The TPS92513/HV LED drivers feature separate inputs for analog and pulse width modulation (PWM) dimming for no compromise brightness control achieving contrast ratios of greater than 10:1 and greater than 100:1, respectively. The PWM input is compatible with low-voltage logic standards for easy interface to a broad range of microcontrollers. The analog LED current setpoint is adjustable from 0 V to 300 mV using the IADJ input with an external 0 V to 1.8 V signal.
For multi-string applications using two or more TPS92513/HV LED drivers, the internal oscillator can be overdriven by an external clock ensuring all of the converters operate at a common frequency thereby reducing the potential for beat frequencies and simplifying system EMI filtering. An adjustable input under-voltage lockout (UVLO) with hysteresis provides flexibility in setting start/stop voltages based upon supply voltage conditions.
The TPS92513includes cycle-by-cycle overcurrent protection and thermal shutdown protection. It is available in a 10-pin HVSSOP PowerPAD™ package.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
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TPS92513 | HVSSOP (10) | 5.00 mm x 3.00 mm |
TPS92513HV |
DATE | REVISION | NOTES |
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April 2015 | * | Initial release. |
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
BOOT | 1 | O | A bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor is below the minimum required by the output device, the output is forced to switch off until the capacitor is recharged. |
COMP | 8 | O | Error amplifier output, and input to the output switch current comparator. Connect frequency compensation components to this pin. |
GND | 9 | G | Ground. |
IADJ | 6 | I | Analog current adjust pin. The voltage applied to this pin will set the current sense (ISENSE pin) voltage. The range of the ADJ pin is 180 mV to 1.8 V and the corresponding ISENSE pin voltage is the IADJ pin voltage divided by 6. |
ISENSE | 7 | I | Inverting node of the transconductance (gM) error amplifier. |
PDIM | 4 | I | PWM dimming input pin. The duty cycle of the PWM signal linearly controls the average output current of the converter. |
PH | 10 | O | The source of the internal high-side MOSFET. |
PowerPAD | PAD | G | GND pin must be electrically connected to the exposed pad directly beneath the device on the printed circuit board for proper operation. |
RT/CLK | 5 | I | Resistor timing and external clock. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to program the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin becomes a high impedance clock input to the internal PLL. If the clocking edges stop, the internal amplifier is re-enabled and the mode returns to the resistor-programmed function. |
UVLO | 3 | I | Adjustable undervoltage lockout. Set with resistor divider from VIN. |
VIN | 2 | P | Input supply voltage, 4.5V to 42V or 4.5V to 60V for the HV version. |