SLUSCX8C March 2019 – March 2021 TPS92682-Q1
PRODUCTION DATA
LHCH2IADJ register programs the 8-bit IADJ DAC for channel-2. The settings in this register are applied when LH pin is set high. If LHCH2IADJ ≤ 8, the channel-2 is turned off. The DAC output can be set from 85 mV (code 9) to 2.4 V (code 255).
ADDR | REGISTER | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | DEFAULT |
---|---|---|---|---|---|---|---|---|---|---|
19h | LHCH2IADJ | LHCH2IADJ7:0 | 00000000 |
If 2PH is set to '1', only CH1 parameter is used.