SLUSCX8C March 2019 – March 2021 TPS92682-Q1
PRODUCTION DATA
The SOFTSTART register determines the division factor to be applied to the input clock of the soft-start 8-bit ramp counter.
ADDR | REGISTER | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | DEFAULT |
---|---|---|---|---|---|---|---|---|---|---|
06h | SOFTSTART | CH2SS3:0 | CH1SS3:0 | 01110111 |
0000: Soft-start is disabled.
0001: Division factor = 2
0010: Division factor = 4
0011: Division factor = 6
0100: Division factor = 8
0101: Division factor = 12
0110: Division factor = 16
0111: Division factor = 20
1000: Division factor = 26
1001: Division factor = 32
1010: Division factor = 38
1011: Division factor = 46
1100: Division factor = 54
1101: Division factor = 64
1110: Division factor = 80
1111: Division factor = 100
If 2PH is set to '1', only CH1 parameter is used.