SLVSG43A December 2023 – November 2024 TPSI3100-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PIN | I/O | TYPE(1) | DESCRIPTION | |
---|---|---|---|---|
NO. | NAME | |||
1 | EN | I | — | Active high driver enable. Internal 500kΩ pull-down to VSSP. |
2 | CE | I | — | Active high input. When asserted low, device is disabled. Tie to VDDP when not used. Internal 500kΩ pull-down to VSSP. |
3 | VSSP | — | GND | Ground supply for primary side. All VSSP pins must be connected to the primary side ground. |
4 | VDDP | — | P | Power supply for the primary side. |
5 | PGOOD | O | — | Power good indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
6 | FLT1 | O | — | Fault 1 indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
7 | ALM1 | O | — | Alarm 1 indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
8 | VSSP | — | GND | Ground supply for the primary side. All VSSP must be connected to the primary side ground. |
9 | VSSS | — | GND | Ground supply for the secondary side. All VSSS pins must be connected to the secondary side ground. |
10 | RESP | O | — | Used in conjunction with an external resistor connected to VSSS to adjust comparator response time. When not being used, tie to VSSS. |
11 | ALM1_CMP | I | — | Analog comparator input. When ALM1_CMP voltage exceeds internal reference voltage, ALM1 is asserted low within tALM_LATENCY. Internal 2.8MΩ pull-down to VSSS. When not being used, tie to VSSS. |
12 | FLT1_CMP | I | — | Analog comparator input. When FLT1_CMP voltage exceeds internal reference voltage, VDRV is automatically asserted low regardless of EN state and FLT1 asserted low within tFLT_LATENCY. Internal 2.8MΩ pull-down to VSSS. When not being used, tie to VSSS. |
13 | VDDM | — | P | Generated mid-supply, nominal 5V. |
14 | VSSS | — | GND | Ground supply for secondary side. All VSSS pins must be connected to the secondary side ground. |
15 | VDDH | — | P | Generated high supply, nominal 17V. |
16 | VDRV | O | — | Active high driver output. |
PIN | I/O | TYPE(1) | DESCRIPTION | |
---|---|---|---|---|
NO. | NAME | |||
1 | EN | I | — | Active high driver enable. Internal 500kΩ pull-down to VSSP. |
2 | CE | I | — | Active high input. When asserted low, device is disabled. Tie to VDDP when not used. Internal 500kΩ pull-down to VSSP. |
3 | VSSP | — | GND | Ground supply for primary side. All VSSP pins must be connected to the primary side ground. |
4 | VDDP | — | P | Power supply for the primary side. |
5 | PGOOD | O | — | Power good indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
6 | FLT1 | O | — | Fault 1 indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
7 | FLT2 | O | — | Fault 2 indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
8 | VSSP | — | GND | Ground supply for the primary side. All VSSP pins must be connected to the primary side ground. |
9 | VSSS | — | GND | Ground supply for the secondary side. All VSSS pins must be connected to the secondary side ground. |
10 | RESP | O | — | Used in conjunction with an external resistor connected to VSSS to adjust comparator response time. When not being used, tie to VSSS. |
11 | FLT2_CMP | I | — | Analog comparator input. When FLT2_CMP voltage exceeds internal reference voltage, VDRV is automatically asserted low regardless of EN state and FLT2 asserted low within tFLT_LATENCY. Internal 2.8MΩ pull-down to VSSS. When not being used, tie to VSSS. |
12 | FLT1_CMP | I | — | Analog comparator input. When FLT1_CMP voltage exceeds internal reference voltage, VDRV is automatically asserted low regardless of EN state and FLT1 asserted low within tFLT_LATENCY. Internal 2.8MΩ pull-down to VSSS. When not being used, tie to VSSS. |
13 | VDDM | — | P | Generated mid-supply, nominal 5V. |
14 | VSSS | — | GND | Ground supply for secondary side. All VSSS pins must be connected to the secondary side ground. |
15 | VDDH | — | P | Generated high supply, nominal 17V. |
16 | VDRV | O | — | Active high driver output. |
PIN | I/O | TYPE(1) | DESCRIPTION | |
---|---|---|---|---|
NO. | NAME | |||
1 | EN | I | — | Active high driver enable. Internal 500kΩ pull-down to VSSP. |
2 | CE | I | — | Active high input. When asserted low, device is disabled. Tie to VDDP when not used. Internal 500kΩ pull-down to VSSP. |
3 | VSSP | — | GND | Ground supply for primary side. All VSSP pins must be connected to the primary side ground. |
4 | VDDP | — | P | Power supply for the primary side. |
5 | PGOOD | O | — | Power good indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
6 | ALM1 | O | — | Alarm 1 indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
7 | ALM2 | O | — | Alarm 2 indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
8 | VSSP | — | GND | Ground supply for the primary side. All VSSP pins must be connected to the primary side ground. |
9 | VSSS | — | GND | Ground supply for the secondary side. All VSSS pins must be connected to the secondary side ground. |
10 | RESP | O | — | Used in conjunction with an external resistor connected to VSSS to adjust comparator response time. When not being used, tie to VSSS. |
11 | ALM2_CMP | I | — | Analog comparator input. When ALM2_CMP voltage exceeds internal reference voltage, ALM2 is asserted low within tALM_LATENCY. Internal 2.8MΩ pull-down to VSSS. When not being used, tie to VSSS. |
12 | ALM1_CMP | I | — | Analog comparator input. When ALM1_CMP voltage exceeds internal reference voltage, ALM1 is asserted low within tALM_LATENCY. Internal 2.8MΩ pull-down to VSSS. When not being used, tie to VSSS. |
13 | VDDM | — | P | Generated mid-supply, nominal 5V. |
14 | VSSS | — | GND | Ground supply for secondary side. All VSSS pins must be connected to the secondary side ground. |
15 | VDDH | — | P | Generated high supply, nominal 17V. |
16 | VDRV | O | — | Active high driver output. |
PIN | I/O | TYPE(1) | DESCRIPTION | |
---|---|---|---|---|
NO. | NAME | |||
1 | EN | I | — | Active high driver enable. Internal 500kΩ pull-down to VSSP. |
2 | CE | I | — | Active high input. When asserted low, device is disabled. Tie to VDDP when not used. Internal 500kΩ pull-down to VSSP. |
3 | VSSP | — | GND | Ground supply for primary side. All VSSP pins must be connected to the primary side ground. |
4 | VDDP | — | P | Power supply for the primary side. |
5 | PGOOD | O | — | Power good indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
6 | FLT1 | O | — | Fault 1 indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
7 | ALM1 | O | — | Alarm 1 indicator. Open-drain output. When being used, requires external pull-up to VDDP. Float or tie to VSSP when not used. |
8 | VSSP | — | GND | Ground supply for the primary side. All VSSP pins must be connected to the primary side ground. |
9 | VSSS | — | GND | Ground supply for the secondary side. All VSSS pins must be connected to the secondary side ground. |
10 | RESP | O | — | Used in conjunction with an external resistor connected to VSSS to adjust comparator response time. When not being used, tie to VSSS. |
11 | ALM1_CMP | I | — | Analog comparator input. When ALM1_CMP voltage exceeds internal reference voltage, ALM1 is asserted low within tALM_LATENCY. Internal 2.8MΩ pull-down to VSSS. When not being used, tie to VSSS. |
12 | FLT1_CMP | I/O | — | Analog comparator input/output. When EN state is low, FLT1_CMP is actively pulled low. If EN state is high and FLT1_CMP voltage exceeds internal reference voltage, VDRV is automatically asserted low and FLT1 asserted low within tFLT_LATENCY. Internal 2.8MΩ pull-down to VSSS. When not being used, tie to VSSS. |
13 | VDDM | — | P | Generated mid-supply, nominal 5V. |
14 | VSSS | — | GND | Ground supply for secondary side. All VSSS pins must be connected to the secondary side ground. |
15 | VDDH | — | P | Generated high supply, nominal 17V. |
16 | VDRV | O | — | Active high driver output. |